Merge tag 'phy-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux...

Kishon writes:

phy: for 5.7

*) Rename and Re-design phy-cadence-dp driver to phy-cadence-torrent driver
*) Add new PHY driver for Qualcomm 28nm Hi-Speed USB PHY
*) Add new PHY driver for Qualcomm Super Speed PHY in QCS404
*) Add support for Qualcomm PCIe QMP/QHP PHY in SDM845 to phy-qcom-qmp driver
*) Add support for Qualcomm UFS PHY in MSM8996 to phy-qcom-qmp driver
*) Add support for an additional reference clock in Mediatek phy-mtk-tphy driver
*) Add support for configuring tuning parameters in Mediatek phy-mtk-tphy driver
*) Add support for GMII PHY in TI K3 AM654x/J721E SoCs to phy-gmii-sel driver
*) Add support for USB2 PHY in Amlogic A1 SoC Family to phy-meson-g12a-usb2
   driver
*) Add support for USB3/USB2/PCIe PHY in Socionext Pro5 SoC to
   phy-uniphier-usb3ss/phy-uniphier-usb3hs/phy-uniphier-pcie driver respectively
*) Add support for QUSB2 PHY in Qualcomm SC7180 in driver
*) Convert dt-bindings of Cadence DP, Qualcomm QUSB2 to YAML format

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* tag 'phy-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (52 commits)
  phy: qcom-qusb2: Add new overriding tuning parameters in QUSB2 V2 PHY
  phy: qcom-qusb2: Add support for overriding tuning parameters in QUSB2 V2 PHY
  dt-bindings: phy: qcom-qusb2: Add support for overriding Phy tuning parameters
  phy: qcom-qusb2: Add generic QUSB2 V2 PHY support
  dt-bindings: phy: qcom,qusb2: Add compatibles for QUSB2 V2 phy and SC7180
  dt-bindings: phy: qcom,qusb2: Convert QUSB2 phy bindings to yaml
  phy: rk-inno-usb2: Decrease verbosity of repeating log.
  phy: amlogic: Add Amlogic A1 USB2 PHY Driver
  dt-bindings: phy: Add Amlogic A1 USB2 PHY Bindings
  phy: ti: gmii-sel: add support for am654x/j721e soc
  dt-bindings: phy: ti: gmii-sel: add support for am654x/j721e soc
  phy: qualcomm: usb: Add SuperSpeed PHY driver
  dt-bindings: Add Qualcomm USB SuperSpeed PHY bindings
  phy: qualcomm: Add Synopsys 28nm Hi-Speed USB PHY driver
  dt-bindings: phy: Add Qualcomm Synopsys Hi-Speed USB PHY binding
  dt-bindings: phy: remove qcom-dwc3-usb-phy
  phy: phy-mtk-tphy: add a new reference clock
  phy: phy-mtk-tphy: remove unused u3phya_ref clock
  phy: phy-mtk-tphy: make the ref clock optional
  phy: phy-mtk-tphy: add a property for internal resistance
  ...

diff --combined drivers/phy/ti/phy-gmii-sel.c
index 1c536fc,1f7f7b4..7edd5c3
--- 1/drivers/phy/ti/phy-gmii-sel.c
--- 2/drivers/phy/ti/phy-gmii-sel.c
+++ b/drivers/phy/ti/phy-gmii-sel.c
@@@ -80,20 -80,20 +80,20 @@@ static int phy_gmii_sel_mode(struct ph
                break;
  
        case PHY_INTERFACE_MODE_MII:
 -              mode = AM33XX_GMII_SEL_MODE_MII;
 +      case PHY_INTERFACE_MODE_GMII:
 +              gmii_sel_mode = AM33XX_GMII_SEL_MODE_MII;
                break;
  
        default:
 -              dev_warn(dev,
 -                       "port%u: unsupported mode: \"%s\". Defaulting to MII.\n",
 -                       if_phy->id, phy_modes(rgmii_id));
 +              dev_warn(dev, "port%u: unsupported mode: \"%s\"\n",
 +                       if_phy->id, phy_modes(submode));
                return -EINVAL;
        }
  
        if_phy->phy_if_mode = submode;
  
        dev_dbg(dev, "%s id:%u mode:%u rgmii_id:%d rmii_clk_ext:%d\n",
 -              __func__, if_phy->id, mode, rgmii_id,
 +              __func__, if_phy->id, submode, rgmii_id,
                if_phy->rmii_clock_external);
  
        regfield = if_phy->fields[PHY_GMII_SEL_PORT_MODE];
@@@ -170,6 -170,21 +170,21 @@@ struct phy_gmii_sel_soc_data phy_gmii_s
        .regfields = phy_gmii_sel_fields_am33xx,
  };
  
+ static const
+ struct reg_field phy_gmii_sel_fields_am654[][PHY_GMII_SEL_LAST] = {
+       {
+               [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x4040, 0, 1),
+               [PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD((~0), 0, 0),
+               [PHY_GMII_SEL_RMII_IO_CLK_EN] = REG_FIELD((~0), 0, 0),
+       },
+ };
+ 
+ static const
+ struct phy_gmii_sel_soc_data phy_gmii_sel_soc_am654 = {
+       .num_ports = 1,
+       .regfields = phy_gmii_sel_fields_am654,
+ };
+ 
  static const struct of_device_id phy_gmii_sel_id_table[] = {
        {
                .compatible     = "ti,am3352-phy-gmii-sel",
@@@ -187,6 -202,10 +202,10 @@@
                .compatible     = "ti,dm814-phy-gmii-sel",
                .data           = &phy_gmii_sel_soc_dm814,
        },
+       {
+               .compatible     = "ti,am654-phy-gmii-sel",
+               .data           = &phy_gmii_sel_soc_am654,
+       },
        {}
  };
  MODULE_DEVICE_TABLE(of, phy_gmii_sel_id_table);