* that we support some form of unmap - in thise case via WRITE SAME
* with the unmap bit set.
*/
- if (ata_id_has_trim(args->id))
+ if (ata_id_has_trim(args->id)) {
+ put_unaligned_be32(65535 * 512 / 8, &rbuf[20]);
put_unaligned_be32(1, &rbuf[28]);
+ }
return 0;
}
rbuf[14] = (lowest_aligned >> 8) & 0x3f;
rbuf[15] = lowest_aligned;
- if (ata_id_has_trim(args->id))
- rbuf[14] |= 0x80;
+ if (ata_id_has_trim(args->id)) {
+ rbuf[14] |= 0x80; /* TPE */
+
+ if (ata_id_has_zero_after_trim(args->id))
+ rbuf[14] |= 0x40; /* TPRZ */
+ }
}
return 0;
ATA_ID_EIDE_DMA_TIME = 66,
ATA_ID_EIDE_PIO = 67,
ATA_ID_EIDE_PIO_IORDY = 68,
+ ATA_ID_ADDITIONAL_SUPP = 69,
ATA_ID_QUEUE_DEPTH = 75,
ATA_ID_MAJOR_VER = 80,
ATA_ID_COMMAND_SET_1 = 82,
return 0;
}
+static inline int ata_id_has_zero_after_trim(const u16 *id)
+{
+ /* DSM supported, deterministic read, and read zero after trim set */
+ if (ata_id_has_trim(id) &&
+ (id[ATA_ID_ADDITIONAL_SUPP] & 0x4020) == 0x4020)
+ return 1;
+
+ return 0;
+}
+
static inline int ata_id_current_chs_valid(const u16 *id)
{
/* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command