Identified with misc-static-assert.
// We define our scalable vector types for lmul=1 to use a 64 bit known
// minimum size. e.g. <vscale x 2 x i32>. VLENB is in bytes so we calculate
// vscale as VLENB / 8.
- assert(RISCV::RVVBitsPerBlock == 64 && "Unexpected bits per block!");
+ static_assert(RISCV::RVVBitsPerBlock == 64, "Unexpected bits per block!");
if (isa<ConstantSDNode>(Op.getOperand(0))) {
// We assume VLENB is a multiple of 8. We manually choose the best shift
// here because SimplifyDemandedBits isn't always able to simplify it.
/// Rebalance unknown subgraphs so as each branch splits with probabilities
/// UnknownFirstSuccProbability and 1 - UnknownFirstSuccProbability
void rebalanceUnknownSubgraphs() {
- assert(UnknownFirstSuccProbability >= 0.0 &&
- UnknownFirstSuccProbability <= 1.0 &&
- "the share of the unknown successor should be between 0 and 1");
+ static_assert(
+ UnknownFirstSuccProbability >= 0.0 &&
+ UnknownFirstSuccProbability <= 1.0,
+ "the share of the unknown successor should be between 0 and 1");
// Try to find unknown subgraphs from each non-unknown block
for (uint64_t I = 0; I < Func.Blocks.size(); I++) {
auto SrcBlock = &Func.Blocks[I];
isl_ast_op_type OpType = isl_ast_expr_get_op_type(Expr);
assert(OpType >= isl_ast_op_eq && OpType <= isl_ast_op_gt &&
"Unsupported ICmp isl ast expression");
- assert(isl_ast_op_eq + 4 == isl_ast_op_gt &&
- "Isl ast op type interface changed");
+ static_assert(isl_ast_op_eq + 4 == isl_ast_op_gt,
+ "Isl ast op type interface changed");
CmpInst::Predicate Predicates[5][2] = {
{CmpInst::ICMP_EQ, CmpInst::ICMP_EQ},