drm/amdgpu/vega20: use mode1 reset for RAS and XGMI
authorAlex Deucher <alexander.deucher@amd.com>
Wed, 15 May 2019 18:53:14 +0000 (13:53 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 24 May 2019 17:21:00 +0000 (12:21 -0500)
If RAS or XGMI are enabled, you have to use mode1 reset rather
than BACO.

Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/soc15.c

index f9c9cac..32dc5a1 100644 (file)
@@ -65,6 +65,8 @@
 #include "dce_virtual.h"
 #include "mxgpu_ai.h"
 #include "amdgpu_smu.h"
+#include "amdgpu_ras.h"
+#include "amdgpu_xgmi.h"
 #include <uapi/linux/kfd_ioctl.h>
 
 #define mmMP0_MISC_CGTT_CTRL0                                                                   0x01b9
@@ -485,6 +487,13 @@ static int soc15_asic_reset(struct amdgpu_device *adev)
                        soc15_asic_get_baco_capability(adev, &baco_reset);
                else
                        baco_reset = false;
+               if (baco_reset) {
+                       struct amdgpu_hive_info *hive = amdgpu_get_xgmi_hive(adev, 0);
+                       struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);
+
+                       if (hive || (ras && ras->supported))
+                               baco_reset = false;
+               }
                break;
        default:
                baco_reset = false;