[AArch64] Factor out pfalse predicate creation

Following on from the previous ptrue patch.

2019-06-18  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-protos.h (aarch64_pfalse_reg): Declare.
	* config/aarch64/aarch64.c (aarch64_pfalse_reg): New function.
	* config/aarch64/aarch64-sve.md: Use it.

From-SVN: r272425

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4176498..ce470a8 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,11 @@
 2019-06-18  Richard Sandiford  <richard.sandiford@arm.com>
 
+       * config/aarch64/aarch64-protos.h (aarch64_pfalse_reg): Declare.
+       * config/aarch64/aarch64.c (aarch64_pfalse_reg): New function.
+       * config/aarch64/aarch64-sve.md: Use it.
+
+2019-06-18  Richard Sandiford  <richard.sandiford@arm.com>
+
        * config/aarch64/aarch64-protos.h (aarch64_ptrue_reg): Declare.
        * config/aarch64/aarch64.c (aarch64_ptrue_reg): New functions.
        (aarch64_expand_sve_widened_duplicate, aarch64_expand_sve_mem_move)

diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h
index 3a8be22..4b20796 100644 (file)
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -521,6 +521,7 @@ void aarch64_err_no_fpadvsimd (machine_mode);
 void aarch64_expand_epilogue (bool);
 void aarch64_expand_mov_immediate (rtx, rtx, rtx (*) (rtx, rtx) = 0);
 rtx aarch64_ptrue_reg (machine_mode);
+rtx aarch64_pfalse_reg (machine_mode);
 void aarch64_emit_sve_pred_move (rtx, rtx, rtx);
 void aarch64_expand_sve_mem_move (rtx, rtx, machine_mode);
 bool aarch64_maybe_expand_sve_subreg_move (rtx, rtx);

diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md
index eef8ed6..9055ae5 100644 (file)
--- a/gcc/config/aarch64/aarch64-sve.md
+++ b/gcc/config/aarch64/aarch64-sve.md
@@ -488,7 +488,7 @@
       {
        /* The last element can be extracted with a LASTB and a false
           predicate.  */
-       rtx sel = force_reg (<VPRED>mode, CONST0_RTX (<VPRED>mode));
+       rtx sel = aarch64_pfalse_reg (<VPRED>mode);
        emit_insn (gen_extract_last_<mode> (operands[0], sel, operands[1]));
        DONE;
       }

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index d5dca76..9a30d15 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -2467,6 +2467,15 @@ aarch64_ptrue_reg (machine_mode mode)
   return force_reg (mode, CONSTM1_RTX (mode));
 }
 
+/* Return an all-false predicate register of mode MODE.  */
+
+rtx
+aarch64_pfalse_reg (machine_mode mode)
+{
+  gcc_assert (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL);
+  return force_reg (mode, CONST0_RTX (mode));
+}
+
 /* Return true if we can move VALUE into a register using a single
    CNT[BHWD] instruction.  */