gcc/
authoryroux <yroux@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 14 Apr 2015 17:21:54 +0000 (17:21 +0000)
committeryroux <yroux@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 14 Apr 2015 17:21:54 +0000 (17:21 +0000)
2015-04-14  Yvan Roux  <yvan.roux@linaro.org>

PR target/65729
* lra-constraints.c (prohibited_class_reg_set_mode_p): Restore and fix
the assertiion.

gcc/testsuite/
2015-04-14  Yvan Roux  <yvan.roux@linaro.org>

PR target/65729
* gcc.target/arm/pr65729.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@222101 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/lra-constraints.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/arm/pr65729.c [new file with mode: 0644]

index 6e1f145..d4755f9 100644 (file)
@@ -1,3 +1,9 @@
+2015-04-14  Yvan Roux  <yvan.roux@linaro.org>
+
+       PR target/65729
+       * lra-constraints.c (prohibited_class_reg_set_mode_p): Restore and fix
+       the assertiion.
+
 2015-04-14  Uros Bizjak  <ubizjak@gmail.com>
 
        * config/i386/i386.h (LEGACY_INT_REG_P): New define.
index 7353e7c..90f351b 100644 (file)
@@ -1656,8 +1656,7 @@ prohibited_class_reg_set_mode_p (enum reg_class rclass,
 {
   HARD_REG_SET temp;
   
-  // ??? Is this assert right
-  // lra_assert (hard_reg_set_subset_p (set, reg_class_contents[rclass]));
+  lra_assert (hard_reg_set_subset_p (reg_class_contents[rclass], set));
   COPY_HARD_REG_SET (temp, set);
   AND_COMPL_HARD_REG_SET (temp, lra_no_alloc_regs);
   return (hard_reg_set_subset_p
index 6d2d5de..2f6ef32 100644 (file)
@@ -1,3 +1,8 @@
+2015-04-14  Yvan Roux  <yvan.roux@linaro.org>
+
+       PR target/65729
+       * gcc.target/arm/pr65729.c: New test.
+
 2015-04-14  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/65758
diff --git a/gcc/testsuite/gcc.target/arm/pr65729.c b/gcc/testsuite/gcc.target/arm/pr65729.c
new file mode 100644 (file)
index 0000000..0d7e3c1
--- /dev/null
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16" } */
+
+int foo (void)
+{
+  double x = 0.0;
+  asm volatile ("" : "+gw" (x));
+  return x;
+}