dt-bindings: pinctrl: ocelot: Add Sparx5 SoC support
authorLars Povlsen <lars.povlsen@microchip.com>
Wed, 13 May 2020 12:55:25 +0000 (14:55 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 18 May 2020 07:32:43 +0000 (09:32 +0200)
This adds documentation for the "compatible" value designated for Sparx5

Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Link: https://lore.kernel.org/r/20200513125532.24585-8-lars.povlsen@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt

index 32a8a8f..0091244 100644 (file)
@@ -2,8 +2,8 @@ Microsemi Ocelot pin controller Device Tree Bindings
 ----------------------------------------------------
 
 Required properties:
- - compatible          : Should be "mscc,ocelot-pinctrl" or
-                               "mscc,jaguar2-pinctrl"
+ - compatible          : Should be "mscc,ocelot-pinctrl",
+                         "mscc,jaguar2-pinctrl" or "microchip,sparx5-pinctrl"
  - reg                 : Address and length of the register set for the device
  - gpio-controller     : Indicates this device is a GPIO controller
  - #gpio-cells         : Must be 2.