GFX-3D: WA: program SGXMP2 clock gating earlier

BZ:26839

WA in PO: Program SGX544MP master clk gating earlie, or CPU stuck later
before loading SGX driver, root cause is still unkown
Signed-off-by: Yun(Mark) Tu <yun.tu@intel.com>
Change-Id: I921f5f85ca5f98efcaab2aa56225977ee3e9bd9b
Reviewed-on: http://android.intel.com:8080/41718
Reviewed-by: Tu, Yun <yun.tu@intel.com>
Reviewed-by: Dai, Yu <yu.dai@intel.com>
Reviewed-by: Xu, Randy <randy.xu@intel.com>
Tested-by: Xu, Randy <randy.xu@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>

diff --git a/drivers/staging/mrst/drv/psb_drv.c b/drivers/staging/mrst/drv/psb_drv.c
index 4bc9e7b..a277692 100644 (file)
--- a/drivers/staging/mrst/drv/psb_drv.c
+++ b/drivers/staging/mrst/drv/psb_drv.c
@@ -1677,6 +1677,22 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
        if (!dev_priv->sgx_reg)
                goto out_err;
 
+       /*WA in PO: Program SGX544MP master clk gating earlier, or CPU stuck later
+        *before loading SGX driver, root cause is still unkown
+        */
+#if defined(SGX_FEATURE_MP)
+       if (IS_CTP_NEED_WA(dev)) {
+               if (SGX_FEATURE_MP_CORE_COUNT == 2) {
+                       iowrite32(0x1, dev_priv->sgx_reg + 0x4000);
+                       iowrite32(0xa, dev_priv->sgx_reg + 0x4004);
+               } else if  (SGX_FEATURE_MP_CORE_COUNT == 1) {
+                       iowrite32(0x0, dev_priv->sgx_reg + 0x4000);
+                       iowrite32(0x2, dev_priv->sgx_reg + 0x4004);
+               }
+               iowrite32(0x2aa, dev_priv->sgx_reg + 0x4020);
+       }
+#endif
+
        if (IS_MID(dev)) {
                mrst_get_fuse_settings(dev);
                mrst_get_vbt_data(dev_priv);

diff --git a/drivers/staging/mrst/drv/psb_drv.h b/drivers/staging/mrst/drv/psb_drv.h
index 5132def..19fcd0c 100644 (file)
--- a/drivers/staging/mrst/drv/psb_drv.h
+++ b/drivers/staging/mrst/drv/psb_drv.h
@@ -1549,6 +1549,9 @@ do {                                                \
 #define IS_CTP(dev) (((dev->pci_device & 0xffff) == 0x08c0) || \
                     ((dev->pci_device & 0xffff) == 0x08c7) ||  \
                     ((dev->pci_device & 0xffff) == 0x08c8))
+
+#define IS_CTP_NEED_WA(dev) ((dev->pci_device & 0xffff) == 0x08c8)
+
 #define IS_MDFLD(dev) (IS_CTP(dev) || IS_MDFLD_OLD(dev))
 #define IS_MID(dev) (IS_MRST(dev) || IS_MDFLD(dev))