jh7110-evb.dtb \
jh7110-fpga.dtb \
jh7110-evb-can-pdm-pwmdac.dtb \
+ jh7110-evb-canfd.dtb \
jh7110-evb-dvp-rgb2hdmi.dtb \
jh7110-evb-pcie-i2s-sd.dtb \
jh7110-evb-i2s-ac108.dtb \
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022 William Qiu <william.qiu@starfivetech.com>
+ */
+
+/dts-v1/;
+#include "jh7110-evb.dtsi"
+
+/ {
+ model = "StarFive JH7110 EVB";
+ compatible = "starfive,jh7110-evb", "starfive,jh7110";
+};
+
+/* default sd card */
+&sdio0 {
+ clock-frequency = <102400000>;
+ max-frequency = <200000000>;
+ card-detect-delay = <300>;
+ bus-width = <4>;
+ broken-cd;
+ cap-sd-highspeed;
+ post-power-on-delay-ms = <200>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdcard0_pins>;
+ status = "okay";
+};
+
+&usbdrd30 {
+ status = "okay";
+};
+
+&pcie1 {
+ status = "okay";
+};
+
+&can0 {
+ syscon,can_or_canfd = <1>;
+ status = "okay";
+};
+
+&can1 {
+ syscon,can_or_canfd = <1>;
+ status = "okay";
+};
\ No newline at end of file
<&rstgen RSTN_U0_CAN_CTRL_TIMER>;
reset-names = "rst_apb", "rst_core", "rst_timer";
starfive,sys-syscon = <&sys_syscon 0x10 0x3 0x8>;
- syscon,can_or_canfd = <0>;
status = "disabled";
};
<&rstgen RSTN_U1_CAN_CTRL_TIMER>;
reset-names = "rst_apb", "rst_core", "rst_timer";
starfive,sys-syscon = <&sys_syscon 0x88 0x12 0x40000>;
- syscon,can_or_canfd = <0>;
status = "disabled";
};