perf intel-pt: Prepare to synthesize PEBS samples
authorAdrian Hunter <adrian.hunter@intel.com>
Mon, 10 Jun 2019 07:27:56 +0000 (10:27 +0300)
committerArnaldo Carvalho de Melo <acme@redhat.com>
Mon, 17 Jun 2019 18:57:17 +0000 (15:57 -0300)
Add infrastructure to prepare for synthesizing PEBS samples but leave
the actual synthesis to later patches.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Link: http://lkml.kernel.org/r/20190610072803.10456-5-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
tools/perf/util/intel-pt.c

index 893cef4..cc91c14 100644 (file)
@@ -101,6 +101,9 @@ struct intel_pt {
        u64 pwrx_id;
        u64 cbr_id;
 
+       bool sample_pebs;
+       struct perf_evsel *pebs_evsel;
+
        u64 tsc_bit;
        u64 mtc_bit;
        u64 mtc_freq_bits;
@@ -1535,6 +1538,11 @@ static int intel_pt_synth_pwrx_sample(struct intel_pt_queue *ptq)
                                            pt->pwr_events_sample_type);
 }
 
+static int intel_pt_synth_pebs_sample(struct intel_pt_queue *ptq __maybe_unused)
+{
+       return 0;
+}
+
 static int intel_pt_synth_error(struct intel_pt *pt, int code, int cpu,
                                pid_t pid, pid_t tid, u64 ip, u64 timestamp)
 {
@@ -1622,6 +1630,16 @@ static int intel_pt_sample(struct intel_pt_queue *ptq)
                ptq->ipc_cyc_cnt = ptq->state->tot_cyc_cnt;
        }
 
+       /*
+        * Do PEBS first to allow for the possibility that the PEBS timestamp
+        * precedes the current timestamp.
+        */
+       if (pt->sample_pebs && state->type & INTEL_PT_BLK_ITEMS) {
+               err = intel_pt_synth_pebs_sample(ptq);
+               if (err)
+                       return err;
+       }
+
        if (pt->sample_pwr_events && (state->type & INTEL_PT_PWR_EVT)) {
                if (state->type & INTEL_PT_CBR_CHG) {
                        err = intel_pt_synth_cbr_sample(ptq);