EDAC, i5000, i5400: Fix use of MTR_DRAM_WIDTH macro
authorJérémy Lefaure <jeremy.lefaure@lse.epita.fr>
Thu, 9 Mar 2017 01:18:09 +0000 (20:18 -0500)
committerBorislav Petkov <bp@suse.de>
Thu, 9 Mar 2017 08:25:29 +0000 (09:25 +0100)
The MTR_DRAM_WIDTH macro returns the data width. It is sometimes used
as if it returned a boolean true if the width if 8. Fix the tests where
MTR_DRAM_WIDTH is misused.

Signed-off-by: Jérémy Lefaure <jeremy.lefaure@lse.epita.fr>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/20170309011809.8340-1-jeremy.lefaure@lse.epita.fr
Signed-off-by: Borislav Petkov <bp@suse.de>
drivers/edac/i5000_edac.c
drivers/edac/i5400_edac.c

index 1670d27..f683919 100644 (file)
@@ -1293,7 +1293,7 @@ static int i5000_init_csrows(struct mem_ctl_info *mci)
                        dimm->mtype = MEM_FB_DDR2;
 
                        /* ask what device type on this row */
-                       if (MTR_DRAM_WIDTH(mtr))
+                       if (MTR_DRAM_WIDTH(mtr) == 8)
                                dimm->dtype = DEV_X8;
                        else
                                dimm->dtype = DEV_X4;
index abf6ef2..37a9ba7 100644 (file)
@@ -1207,13 +1207,14 @@ static int i5400_init_dimms(struct mem_ctl_info *mci)
 
                        dimm->nr_pages = size_mb << 8;
                        dimm->grain = 8;
-                       dimm->dtype = MTR_DRAM_WIDTH(mtr) ? DEV_X8 : DEV_X4;
+                       dimm->dtype = MTR_DRAM_WIDTH(mtr) == 8 ?
+                                     DEV_X8 : DEV_X4;
                        dimm->mtype = MEM_FB_DDR2;
                        /*
                         * The eccc mechanism is SDDC (aka SECC), with
                         * is similar to Chipkill.
                         */
-                       dimm->edac_mode = MTR_DRAM_WIDTH(mtr) ?
+                       dimm->edac_mode = MTR_DRAM_WIDTH(mtr) == 8 ?
                                          EDAC_S8ECD8ED : EDAC_S4ECD4ED;
                        ndimms++;
                }