Merge branch 'CR_2888_515_clocktree_pll0_Xingyu.Wu' into 'jh7110-5.15.y-devel'

CR_2888_515_clocktree_pll0_Xingyu.Wu

See merge request sdk/linux!644

diff --git a/drivers/clk/starfive/clk-starfive-jh7110-gen.c b/drivers/clk/starfive/clk-starfive-jh7110-gen.c
index cf974d2..d852c0a 100644 (file)
--- a/drivers/clk/starfive/clk-starfive-jh7110-gen.c
+++ b/drivers/clk/starfive/clk-starfive-jh7110-gen.c
@@ -392,7 +392,7 @@ static int __init clk_starfive_jh7110_probe(struct platform_device *pdev)
                if (PLL0_DEFAULT_FREQ >= PLL0_FREQ_1500_VALUE) {
                        struct clk *cpu_core = priv->reg[JH7110_CPU_CORE].hw.clk;
 
-                       if (clk_set_rate(cpu_core, PLL0_FREQ_1500_VALUE / 2)) {
+                       if (clk_set_rate(cpu_core, clk_get_rate(pll0_clk) / 2)) {
                                dev_err(&pdev->dev, "set cpu_core rate failed\n");
                                goto failed_set;
                        }

diff --git a/drivers/clk/starfive/clk-starfive-jh7110-pll.h b/drivers/clk/starfive/clk-starfive-jh7110-pll.h
index 1668c22..8784318 100644 (file)
--- a/drivers/clk/starfive/clk-starfive-jh7110-pll.h
+++ b/drivers/clk/starfive/clk-starfive-jh7110-pll.h
@@ -125,9 +125,7 @@ enum starfive_pll0_freq_value {
        PLL0_FREQ_1000_VALUE = 1000000000,
        PLL0_FREQ_1250_VALUE = 1250000000,
        PLL0_FREQ_1375_VALUE = 1375000000,
-       PLL0_FREQ_1500_VALUE = 1500000000,
-       PLL0_FREQ_1625_VALUE = 1625000000,
-       PLL0_FREQ_1750_VALUE = 1750000000
+       PLL0_FREQ_1500_VALUE = 1500000000
 };
 
 enum starfive_pll0_freq {
@@ -140,9 +138,7 @@ enum starfive_pll0_freq {
        PLL0_FREQ_1250,
        PLL0_FREQ_1375,
        PLL0_FREQ_1500,
-       PLL0_FREQ_1625,
-       PLL0_FREQ_1750,
-       PLL0_FREQ_MAX
+       PLL0_FREQ_MAX = PLL0_FREQ_1500
 };
 
 enum starfive_pll1_freq_value {
@@ -164,7 +160,7 @@ enum starfive_pll2_freq {
 };
 
 static const struct starfive_pll_syscon_value
-       jh7110_pll0_syscon_freq[PLL0_FREQ_MAX] = {
+       jh7110_pll0_syscon_freq[] = {
        [PLL0_FREQ_375] = {
                .freq = PLL0_FREQ_375_VALUE,
                .prediv = 8,
@@ -237,22 +233,6 @@ static const struct starfive_pll_syscon_value
                .dacpd = 1,
                .dsmpd = 1,
        },
-       [PLL0_FREQ_1625] = {
-               .freq = PLL0_FREQ_1625_VALUE,
-               .prediv = 24,
-               .fbdiv = 1625,
-               .postdiv1 = 1,
-               .dacpd = 1,
-               .dsmpd = 1,
-       },
-       [PLL0_FREQ_1750] = {
-               .freq = PLL0_FREQ_1750_VALUE,
-               .prediv = 12,
-               .fbdiv = 875,
-               .postdiv1 = 1,
-               .dacpd = 1,
-               .dsmpd = 1,
-       },
 };
 
 static const struct starfive_pll_syscon_value