Passing double arg regs via `r0:r1` or `r2:r3`,
each RefPosition's RegMask should have only one exact register
so the candidate register can be fixed.
e.g.)
```
<RefPosition #4099 @2625 RefTypeUse <Ivl:1237> BB35 regmask=[r0-r1] last>
<RefPosition #4100 @2625 RefTypeUse <Ivl:1238> BB35 regmask=[r0-r1] last>
```
to be:
```
<RefPosition #4099 @2625 RefTypeUse <Ivl:1237> BB35 regmask=[r0] last fixed>
<RefPosition #4100 @2625 RefTypeUse <Ivl:1238> BB35 regmask=[r1] last fixed>
```
Fix #12994
#endif // DEBUG
regMaskTP candidates = getUseCandidates(useNode);
+#ifdef ARM_SOFTFP
+ // If oper is GT_PUTARG_REG, set bits in useCandidates must be in sequential order.
+ if (useNode->OperGet() == GT_PUTARG_REG || useNode->OperGet() == GT_COPY)
+ {
+ regMaskTP candidate = genFindLowestReg(candidates);
+ useNode->gtLsraInfo.setSrcCandidates(this, candidates & ~candidate);
+ candidates = candidate;
+ }
+#endif // ARM_SOFTFP
assert((candidates & allRegs(i->registerType)) != 0);
// For non-localVar uses we record nothing, as nothing needs to be written back to the tree.
#endif // _TARGET_ARM_
else
{
- assert(!varTypeIsMultiReg(tree));
+ assert(!varTypeIsMultiReg(tree) || (m_rsCompiler->opts.compUseSoftFP && treeType == TYP_LONG));
tree->gtFlags &= ~GTF_SPILL;
}
#endif // !LEGACY_BACKEND