[ARC] Disassembler: fix LIMM detection for short instructions.

The ARC (short) instructions are using a special register number to
indicate is the instruction uses a long immediate (LIMM).  In the case
of short instruction, this LIMM indicator depends on the ISA version
used. Thus, for ARCv1 processors, the LIMM indicator is 0x3E, the same
value used in "long" instructions.  However, for the ARCv2 processors,
this LIMM indicator is 0x1E.

This patch fixes the LIMM detection for ARCv1 ISA and adds two tests.

gas/
2016-10-13  Claudiu Zissulescu  <claziss@synopsys.com>

	* testsuite/gas/arc/shortlimm_a7.d: New file.
	* testsuite/gas/arc/shortlimm_a7.s: Likewise.
	* testsuite/gas/arc/shortlimm_hs.d: Likewise.
	* testsuite/gas/arc/shortlimm_hs.s: Likewise.

include/
2016-10-13  Claudiu Zissulescu  <claziss@synopsys.com>

	* opcode/arc.h (ARC_OPCODE_ARCV2): New define.

opcodes/
2016-10-13  Claudiu Zissulescu  <claziss@synopsys.com>

        * arc-dis.c (find_format_from_table): Discriminate LIMM indicator
	usage on ISA basis.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index da3bc5a..c220884 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
+
+       * testsuite/gas/arc/shortlimm_a7.d: New file.
+       * testsuite/gas/arc/shortlimm_a7.s: Likewise.
+       * testsuite/gas/arc/shortlimm_hs.d: Likewise.
+       * testsuite/gas/arc/shortlimm_hs.s: Likewise.
+
 2016-10-11  Nick Clifton  <nickc@redhat.com>
 
        * gas/arm/tls.d: Adjust output to match change in objdump.

diff --git a/gas/testsuite/gas/arc/shortlimm_a7.d b/gas/testsuite/gas/arc/shortlimm_a7.d
new file mode 100644 (file)
index 0000000..efed86f
--- /dev/null
+++ b/gas/testsuite/gas/arc/shortlimm_a7.d
@@ -0,0 +1,11 @@
+#objdump: -d
+
+.*: +file format .*arc.*
+
+
+Disassembly of section .text:
+
+00000000 <.text>:
+   0:  70c7 0000 1000          add_s   r0,r0,0x1000
+   6:  72d7 0000 1000          cmp_s   r2,0x1000
+   c:  72cf 0000 1000          mov_s   r2,0x1000

diff --git a/gas/testsuite/gas/arc/shortlimm_a7.s b/gas/testsuite/gas/arc/shortlimm_a7.s
new file mode 100644 (file)
index 0000000..fd14206
--- /dev/null
+++ b/gas/testsuite/gas/arc/shortlimm_a7.s
@@ -0,0 +1,5 @@
+       .cpu ARC700
+       .text
+       add_s   r0,r0,0x1000
+       cmp_s   r2,0x1000
+       mov_s   r2,0x1000

diff --git a/gas/testsuite/gas/arc/shortlimm_hs.d b/gas/testsuite/gas/arc/shortlimm_hs.d
new file mode 100644 (file)
index 0000000..0313cff
--- /dev/null
+++ b/gas/testsuite/gas/arc/shortlimm_hs.d
@@ -0,0 +1,15 @@
+#objdump: -d
+
+.*: +file format .*arc.*
+
+
+Disassembly of section .text:
+
+00000000 <.text>:
+   0:  70c3 0000 1000          add_s   r0,r0,0x1000
+   6:  71c7 0000 1001          add_s   0,0x1001,1
+   c:  72d3 0000 1000          cmp_s   r2,0x1000
+  12:  71d7 0000 1000          cmp_s   0x1000,1
+  18:  42c3 0000 1000          mov_s   r2,0x1000
+  1e:  46db 0000 1000          mov_s   0,0x1000
+  24:  72df 0000 1000          mov_s.ne        r2,0x1000

diff --git a/gas/testsuite/gas/arc/shortlimm_hs.s b/gas/testsuite/gas/arc/shortlimm_hs.s
new file mode 100644 (file)
index 0000000..3f2be12
--- /dev/null
+++ b/gas/testsuite/gas/arc/shortlimm_hs.s
@@ -0,0 +1,9 @@
+       .cpu HS
+       .text
+       add_s   r0,r0,0x1000
+       add_s   0,0x1001,1
+       cmp_s   r2,0x1000
+       cmp_s   0x1000,1
+       mov_s   r2,0x1000
+       mov_s   0,0x1000
+       mov_s.ne        r2,0x1000

diff --git a/include/ChangeLog b/include/ChangeLog
index 652bb21..6f68130 100644 (file)
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,7 @@
+2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
+
+       * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
+
 2016-09-29  Alan Modra  <amodra@gmail.com>
 
        * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.

diff --git a/include/opcode/arc.h b/include/opcode/arc.h
index 09e973b..724fdee 100644 (file)
--- a/include/opcode/arc.h
+++ b/include/opcode/arc.h
@@ -186,6 +186,7 @@ extern const struct arc_opcode arc_opcodes[];
 #define ARC_OPCODE_ARCALL  (ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700      \
                            | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS)
 #define ARC_OPCODE_ARCFPX  (ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM)
+#define ARC_OPCODE_ARCV2   (ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS)
 
 /* CPU extensions.  */
 #define ARC_EA       0x0001

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 3ac9c3f..11ee455 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
+
+       * arc-dis.c (find_format_from_table): Discriminate LIMM indicator
+       usage on ISA basis.
+
 2016-10-11  Jiong Wang  <jiong.wang@arm.com>
 
        PR target/20666

diff --git a/opcodes/arc-dis.c b/opcodes/arc-dis.c
index c4e118e..898512c 100644 (file)
--- a/opcodes/arc-dis.c
+++ b/opcodes/arc-dis.c
@@ -296,7 +296,7 @@ find_format_from_table (struct disassemble_info *info,
       /* Possible candidate, check the operands.  */
       for (opidx = opcode->operands; *opidx; opidx++)
        {
-         int value;
+         int value, limmind;
          const struct arc_operand *operand = &arc_operands[*opidx];
 
          if (operand->flags & ARC_OPERAND_FAKE)
@@ -309,11 +309,12 @@ find_format_from_table (struct disassemble_info *info,
 
          /* Check for LIMM indicator.  If it is there, then make sure
             we pick the right format.  */
+         limmind = (isa_mask & ARC_OPCODE_ARCV2) ? 0x1E : 0x3E;
          if (operand->flags & ARC_OPERAND_IR
              && !(operand->flags & ARC_OPERAND_LIMM))
            {
              if ((value == 0x3E && insn_len == 4)
-                 || (value == 0x1E && insn_len == 2))
+                 || (value == limmind && insn_len == 2))
                {
                  invalid = TRUE;
                  break;