return 0;
}
-void sbi_boot_other_core(int hartid)
+int c910_hart_start(u32 hartid, ulong saddr)
{
- csr_write(CSR_MRVBR, FW_TEXT_START);
+ csr_write(CSR_MRVBR, saddr);
csr_write(CSR_MRMR, csr_read(CSR_MRMR) | (1 << hartid));
-}
-static int c910_vendor_ext_provider(long extid, long funcid,
- unsigned long *args,
- unsigned long *out_value,
- struct sbi_trap_info *out_trap)
-{
- switch (extid) {
- case SBI_EXT_VENDOR_C910_BOOT_OTHER_CORE:
- sbi_boot_other_core((int)args[0]);
- break;
- default:
- sbi_printf("Unsupported private sbi call: %ld\n", extid);
- asm volatile ("ebreak");
- }
return 0;
}
.system_shutdown = c910_system_shutdown,
- .vendor_ext_provider = c910_vendor_ext_provider,
+ .hart_start = c910_hart_start,
};
const struct sbi_platform platform = {
#define SBI_THEAD_FEATURES \
(SBI_PLATFORM_HAS_SCOUNTEREN | \
SBI_PLATFORM_HAS_MCOUNTEREN | \
- SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
+ SBI_PLATFORM_HAS_MFAULTS_DELEGATION | \
+ SBI_PLATFORM_HAS_HART_SECONDARY_BOOT)
#define CSR_MCOR 0x7c2
#define CSR_MHCR 0x7c1
#define CSR_MRMR 0x7c6
#define CSR_MRVBR 0x7c7
-#define SBI_EXT_VENDOR_C910_BOOT_OTHER_CORE 0x09000003
-
#define C910_PLIC_CLINT_OFFSET 0x04000000 /* 64M */
#define C910_PLIC_DELEG_OFFSET 0x001ffffc
#define C910_PLIC_DELEG_ENABLE 0x1