clk: renesas: r8a77965: Add SATA clock

This patch adds SATA clock to the R8A77965 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[wsa: rebased to upstream base]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
index c596e2a..312f9fe 100644 (file)
--- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -193,6 +193,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
        DEF_MOD("vin1",                 810,    R8A77965_CLK_S0D2),
        DEF_MOD("vin0",                 811,    R8A77965_CLK_S0D2),
        DEF_MOD("etheravb",             812,    R8A77965_CLK_S0D6),
+       DEF_MOD("sata0",                815,    R8A77965_CLK_S3D2),
        DEF_MOD("imr1",                 822,    R8A77965_CLK_S0D2),
        DEF_MOD("imr0",                 823,    R8A77965_CLK_S0D2),