a610 and friends seem not to have tex prefetch.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20991>
bool has_hw_multiview;
+ bool has_fs_tex_prefetch;
+
/* Whether the PC_MULTIVIEW_MASK register exists. */
bool supports_multiview_mask;
self.a6xx.has_gmem_fast_clear = True
self.a6xx.has_hw_multiview = True
+ self.a6xx.has_fs_tex_prefetch = True
self.a6xx.sysmem_per_ccu_cache_size = 64 * 1024
self.a6xx.gmem_ccu_color_cache_fraction = CCUColorCacheFraction.QUARTER.value
a6xx_gen1_low = {**a6xx_gen1, **dict(
has_gmem_fast_clear = False,
has_hw_multiview = False,
+ has_fs_tex_prefetch = False,
sysmem_per_ccu_cache_size = 8 * 1024,
gmem_ccu_color_cache_fraction = CCUColorCacheFraction.HALF.value,
vs_max_inputs_count = 16,
compiler->shared_consts_base_offset = 504;
compiler->shared_consts_size = 8;
compiler->geom_shared_consts_size_quirk = 16;
+
+ compiler->has_fs_tex_prefetch = dev_info->a6xx.has_fs_tex_prefetch;
} else {
compiler->max_const_pipeline = 512;
compiler->max_const_geom = 512;
* TODO: Keep an eye on this for next gens.
*/
uint64_t geom_shared_consts_size_quirk;
+
+ bool has_fs_tex_prefetch;
};
void ir3_compiler_destroy(struct ir3_compiler *compiler);
/* Enable the texture pre-fetch feature only a4xx onwards. But
* only enable it on generations that have been tested:
*/
- if ((so->type == MESA_SHADER_FRAGMENT) && (compiler->gen >= 6))
+ if ((so->type == MESA_SHADER_FRAGMENT) && compiler->has_fs_tex_prefetch)
NIR_PASS_V(ctx->s, ir3_nir_lower_tex_prefetch);
NIR_PASS(progress, ctx->s, nir_lower_phis_to_scalar, true);