[TargetInfo] Sort target features before passing them to the backend

Passing the features in random order will lead to unpredictable results
when some of the features are related (like the architecture-version
features on ARM).

It might be possible to fix this particular case in the ARM target code,
to avoid adding overlapping target features. But we should probably be
sorting in any case: the behavior shouldn't depend on StringMap's
hashing algorithm.

Differential Revision: https://reviews.llvm.org/D46030

llvm-svn: 330861

diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index e325403..2e4b722 100644 (file)
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -638,6 +638,9 @@ TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
   Opts->Features.clear();
   for (const auto &F : Features)
     Opts->Features.push_back((F.getValue() ? "+" : "-") + F.getKey().str());
+  // Sort here, so we handle the features in a predictable order. (This matters
+  // when we're dealing with features that overlap.)
+  llvm::sort(Opts->Features.begin(), Opts->Features.end());
 
   if (!Target->handleTargetFeatures(Opts->Features, Diags))
     return nullptr;

diff --git a/clang/test/CodeGen/arm-build-attributes.c b/clang/test/CodeGen/arm-build-attributes.c
new file mode 100644 (file)
index 0000000..ceb97d1
--- /dev/null
+++ b/clang/test/CodeGen/arm-build-attributes.c
@@ -0,0 +1,4 @@
+// RUN: %clang --target=arm-none-eabi -x c - -o - -S < %s -mcpu=cortex-a5 -mfpu=vfpv4-d16 | FileCheck %s
+// REQUIRES: arm-registered-target
+// CHECK: .fpu vfpv4-d16
+void foo() {}