net: mvpp2: add CM3 SRAM memory map
authorStefan Chulski <stefanc@marvell.com>
Thu, 11 Feb 2021 10:48:50 +0000 (12:48 +0200)
committerDavid S. Miller <davem@davemloft.net>
Thu, 11 Feb 2021 22:50:23 +0000 (14:50 -0800)
This patch adds CM3 memory map.

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/marvell/mvpp2/mvpp2.h
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

index 6bd7e40..56e90ab 100644 (file)
@@ -925,6 +925,7 @@ struct mvpp2 {
        /* Shared registers' base addresses */
        void __iomem *lms_base;
        void __iomem *iface_base;
+       void __iomem *cm3_base;
 
        /* On PPv2.2, each "software thread" can access the base
         * register through a separate address space, each 64 KB apart
index 1435229..57fe5f0 100644 (file)
@@ -6854,6 +6854,27 @@ static int mvpp2_init(struct platform_device *pdev, struct mvpp2 *priv)
        return 0;
 }
 
+static int mvpp2_get_sram(struct platform_device *pdev,
+                         struct mvpp2 *priv)
+{
+       struct resource *res;
+
+       res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
+       if (!res) {
+               if (has_acpi_companion(&pdev->dev))
+                       dev_warn(&pdev->dev, "ACPI is too old, Flow control not supported\n");
+               else
+                       dev_warn(&pdev->dev, "DT is too old, Flow control not supported\n");
+               return 0;
+       }
+
+       priv->cm3_base = devm_ioremap_resource(&pdev->dev, res);
+       if (IS_ERR(priv->cm3_base))
+               return PTR_ERR(priv->cm3_base);
+
+       return 0;
+}
+
 static int mvpp2_probe(struct platform_device *pdev)
 {
        const struct acpi_device_id *acpi_id;
@@ -6910,6 +6931,11 @@ static int mvpp2_probe(struct platform_device *pdev)
                priv->iface_base = devm_ioremap_resource(&pdev->dev, res);
                if (IS_ERR(priv->iface_base))
                        return PTR_ERR(priv->iface_base);
+
+               /* Map CM3 SRAM */
+               err = mvpp2_get_sram(pdev, priv);
+               if (err)
+                       dev_warn(&pdev->dev, "Fail to alloc CM3 SRAM\n");
        }
 
        if (priv->hw_version == MVPP22 && dev_of_node(&pdev->dev)) {