Merge tag 'nvme-5.19-2022-06-23' of git://git.infradead.org/nvme into block-5.19

Pull NVMe fixes from Christoph:

"nvme fixes for Linux 5.19

 - fix the mixed up CRIMS/CRWMS constants (Joel Granados)
 - add another broken identifier quirk (Leo Savernik)
 - fix up a quirk because Samsung reuses PCI IDs over different products
   (Christoph Hellwig)"

* tag 'nvme-5.19-2022-06-23' of git://git.infradead.org/nvme:
  nvme: move the Samsung X5 quirk entry to the core quirks
  nvme: fix the CRIMS and CRWMS definitions to match the spec
  nvme: add a bogus subsystem NQN quirk for Micron MTFDKBA2T0TFH

diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c
index 3ab2cfd..b3d9c29 100644 (file)
--- a/drivers/nvme/host/core.c
+++ b/drivers/nvme/host/core.c
@@ -2546,6 +2546,20 @@ static const struct nvme_core_quirk_entry core_quirks[] = {
                .vid = 0x1e0f,
                .mn = "KCD6XVUL6T40",
                .quirks = NVME_QUIRK_NO_APST,
+       },
+       {
+               /*
+                * The external Samsung X5 SSD fails initialization without a
+                * delay before checking if it is ready and has a whole set of
+                * other problems.  To make this even more interesting, it
+                * shares the PCI ID with internal Samsung 970 Evo Plus that
+                * does not need or want these quirks.
+                */
+               .vid = 0x144d,
+               .mn = "Samsung Portable SSD X5",
+               .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY |
+                         NVME_QUIRK_NO_DEEPEST_PS |
+                         NVME_QUIRK_IGNORE_DEV_SUBNQN,
        }
 };
 

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index c7012e8..d7b24ee 100644 (file)
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -3474,6 +3474,8 @@ static const struct pci_device_id nvme_id_table[] = {
        { PCI_DEVICE(0x1cc1, 0x8201),   /* ADATA SX8200PNP 512GB */
                .driver_data = NVME_QUIRK_NO_DEEPEST_PS |
                                NVME_QUIRK_IGNORE_DEV_SUBNQN, },
+        { PCI_DEVICE(0x1344, 0x5407), /* Micron Technology Inc NVMe SSD */
+               .driver_data = NVME_QUIRK_IGNORE_DEV_SUBNQN },
        { PCI_DEVICE(0x1c5c, 0x1504),   /* SK Hynix PC400 */
                .driver_data = NVME_QUIRK_DISABLE_WRITE_ZEROES, },
        { PCI_DEVICE(0x1c5c, 0x174a),   /* SK Hynix P31 SSD */
@@ -3524,10 +3526,6 @@ static const struct pci_device_id nvme_id_table[] = {
                                NVME_QUIRK_128_BYTES_SQES |
                                NVME_QUIRK_SHARED_TAGS |
                                NVME_QUIRK_SKIP_CID_GEN },
-       { PCI_DEVICE(0x144d, 0xa808),   /* Samsung X5 */
-               .driver_data =  NVME_QUIRK_DELAY_BEFORE_CHK_RDY|
-                               NVME_QUIRK_NO_DEEPEST_PS |
-                               NVME_QUIRK_IGNORE_DEV_SUBNQN, },
        { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
        { 0, }
 };

diff --git a/include/linux/nvme.h b/include/linux/nvme.h
index 29ec3e3..e393400 100644 (file)
--- a/include/linux/nvme.h
+++ b/include/linux/nvme.h
@@ -233,8 +233,8 @@ enum {
 };
 
 enum {
-       NVME_CAP_CRMS_CRIMS     = 1ULL << 59,
-       NVME_CAP_CRMS_CRWMS     = 1ULL << 60,
+       NVME_CAP_CRMS_CRWMS     = 1ULL << 59,
+       NVME_CAP_CRMS_CRIMS     = 1ULL << 60,
 };
 
 struct nvme_id_power_state {