def : InstRW<[PdWriteVPMACS], (instrs VPMACSDQHrr, VPMACSDQLrr, VPMACSSDQHrr,
VPMACSSDQLrr)>;
-defm : PdWriteResXMMPair<WriteMPSAD, [PdFPU0, PdFPMMA], 9, [1, 4], 8>;
+// FIXME: Investigate RR vs RM differences.
+defm : PdWriteRes<WriteMPSAD, [PdFPU0, PdFPMMA], 8, [1, 4], 8>;
+defm : PdWriteRes<WriteMPSADLd, [PdFPU0, PdFPMMA, PdLoad], 14, [1, 4, 3], 8>;
defm : X86WriteResPairUnsupported<WriteMPSADY>;
defm : X86WriteResPairUnsupported<WriteMPSADZ>;
-def PdWriteVMPSADBW : SchedWriteRes<[PdFPU0, PdFPMMA]> {
- let Latency = 8;
- let ResourceCycles = [1, 4];
- let NumMicroOps = 10;
-}
-def : InstRW<[PdWriteVMPSADBW], (instrs VMPSADBWrri)>;
-
defm : PdWriteResXMMPair<WritePSADBW, [PdFPU01, PdFPMAL], 4, [1, 2], 2>;
defm : PdWriteResXMMPair<WritePSADBWX, [PdFPU01, PdFPMAL], 4, [1, 2], 2>;
defm : X86WriteResPairUnsupported<WritePSADBWY>;
# CHECK-NEXT: 2 2 1.00 vmovups %ymm0, %ymm2
# CHECK-NEXT: 8 1 1.00 * vmovups %ymm0, (%rax)
# CHECK-NEXT: 2 5 1.50 * vmovups (%rax), %ymm2
-# CHECK-NEXT: 10 8 4.00 vmpsadbw $1, %xmm0, %xmm1, %xmm2
+# CHECK-NEXT: 8 8 4.00 vmpsadbw $1, %xmm0, %xmm1, %xmm2
# CHECK-NEXT: 8 14 4.00 * vmpsadbw $1, (%rax), %xmm1, %xmm2
# CHECK-NEXT: 1 5 1.00 vmulpd %xmm0, %xmm1, %xmm2
# CHECK-NEXT: 1 10 1.50 * vmulpd (%rax), %xmm1, %xmm2
# CHECK-NEXT: 1 2 1.00 insertps $1, %xmm0, %xmm2
# CHECK-NEXT: 1 7 1.50 * insertps $1, (%rax), %xmm2
# CHECK-NEXT: 1 5 2.00 * movntdqa (%rax), %xmm2
-# CHECK-NEXT: 8 9 4.00 mpsadbw $1, %xmm0, %xmm2
+# CHECK-NEXT: 8 8 4.00 mpsadbw $1, %xmm0, %xmm2
# CHECK-NEXT: 8 14 4.00 * mpsadbw $1, (%rax), %xmm2
# CHECK-NEXT: 1 2 1.00 packusdw %xmm0, %xmm2
# CHECK-NEXT: 1 7 1.50 * packusdw (%rax), %xmm2