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rockchip: rk322x: add CLK_EMMC_SAMPLE clock support
author
Kever Yang
<kever.yang@rock-chips.com>
Tue, 2 Apr 2019 12:41:22 +0000
(20:41 +0800)
committer
Kever Yang
<kever.yang@rock-chips.com>
Wed, 8 May 2019 09:34:12 +0000
(17:34 +0800)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
drivers/clk/rockchip/clk_rk322x.c
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diff --git
a/drivers/clk/rockchip/clk_rk322x.c
b/drivers/clk/rockchip/clk_rk322x.c
index
48ed14b
..
4b599fb
100644
(file)
--- a/
drivers/clk/rockchip/clk_rk322x.c
+++ b/
drivers/clk/rockchip/clk_rk322x.c
@@
-217,6
+217,7
@@
static ulong rockchip_mmc_get_clk(struct rk322x_cru *cru, uint clk_general_rate,
switch (periph) {
case HCLK_EMMC:
case SCLK_EMMC:
+ case SCLK_EMMC_SAMPLE:
con = readl(&cru->cru_clksel_con[11]);
mux = (con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT;
con = readl(&cru->cru_clksel_con[12]);
@@
-293,6
+294,7
@@
static ulong rockchip_mmc_set_clk(struct rk322x_cru *cru, uint clk_general_rate,
switch (periph) {
case HCLK_EMMC:
case SCLK_EMMC:
+ case SCLK_EMMC_SAMPLE:
rk_clrsetreg(&cru->cru_clksel_con[11],
EMMC_PLL_MASK,
mux << EMMC_PLL_SHIFT);