genxml: Add PIPE_CONTROL protected memory bits
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Fri, 18 Dec 2020 09:35:30 +0000 (11:35 +0200)
committerLionel Landwerlin <lionel.g.landwerlin@intel.com>
Thu, 18 Feb 2021 09:20:55 +0000 (11:20 +0200)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9127>

src/intel/genxml/gen12.xml
src/intel/genxml/gen125.xml

index 257be4b..f08d4ff 100644 (file)
     <field name="Global Snapshot Count Reset" start="51" end="51" type="bool"/>
     <field name="Command Streamer Stall Enable" start="52" end="52" type="bool"/>
     <field name="Store Data Index" start="53" end="53" type="uint"/>
+    <field name="Protected Memory Enable" start="54" end="54" type="bool"/>
     <field name="LRI Post Sync Operation" start="55" end="55" type="uint">
       <value name="No LRI Operation" value="0"/>
       <value name="MMIO Write Immediate Data" value="1"/>
       <value name="GGTT" value="1"/>
     </field>
     <field name="Flush LLC" start="58" end="58" type="bool"/>
+    <field name="Protected Memory Disable" start="59" end="59" type="bool"/>
     <field name="Tile Cache Flush Enable" start="60" end="60" type="bool"/>
     <field name="Command Cache Invalidate Enable" start="61" end="61" type="bool"/>
     <field name="Address" start="66" end="111" type="address"/>
index 88ba378..ef2aa1b 100644 (file)
     <field name="Global Snapshot Count Reset" start="51" end="51" type="bool"/>
     <field name="Command Streamer Stall Enable" start="52" end="52" type="bool"/>
     <field name="Store Data Index" start="53" end="53" type="uint"/>
+    <field name="Protected Memory Enable" start="54" end="54" type="bool"/>
     <field name="LRI Post Sync Operation" start="55" end="55" type="uint">
       <value name="No LRI Operation" value="0"/>
       <value name="MMIO Write Immediate Data" value="1"/>
       <value name="GGTT" value="1"/>
     </field>
     <field name="Flush LLC" start="58" end="58" type="bool"/>
+    <field name="Protected Memory Disable" start="59" end="59" type="bool"/>
     <field name="Tile Cache Flush Enable" start="60" end="60" type="bool"/>
     <field name="Command Cache Invalidate Enable" start="61" end="61" type="bool"/>
     <field name="Address" start="66" end="111" type="address"/>