Make PPCSelectionDAGInfo take a DataLayout instead of a TargetMachine
authorEric Christopher <echristo@gmail.com>
Thu, 12 Jun 2014 22:56:48 +0000 (22:56 +0000)
committerEric Christopher <echristo@gmail.com>
Thu, 12 Jun 2014 22:56:48 +0000 (22:56 +0000)
since that's all it needs.

llvm-svn: 210853

llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.cpp
llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h
llvm/lib/Target/PowerPC/PPCTargetMachine.cpp

index 9b7dd3c..dc16742 100644 (file)
@@ -16,9 +16,7 @@ using namespace llvm;
 
 #define DEBUG_TYPE "powerpc-selectiondag-info"
 
-PPCSelectionDAGInfo::PPCSelectionDAGInfo(const PPCTargetMachine &TM)
-  : TargetSelectionDAGInfo(TM.getDataLayout()) {
-}
+PPCSelectionDAGInfo::PPCSelectionDAGInfo(const DataLayout *DL)
+    : TargetSelectionDAGInfo(DL) {}
 
-PPCSelectionDAGInfo::~PPCSelectionDAGInfo() {
-}
+PPCSelectionDAGInfo::~PPCSelectionDAGInfo() {}
index 341b69c..b2e7f3b 100644 (file)
@@ -22,7 +22,7 @@ class PPCTargetMachine;
 
 class PPCSelectionDAGInfo : public TargetSelectionDAGInfo {
 public:
-  explicit PPCSelectionDAGInfo(const PPCTargetMachine &TM);
+  explicit PPCSelectionDAGInfo(const DataLayout *DL);
   ~PPCSelectionDAGInfo();
 };
 
index 04713d0..dc23e95 100644 (file)
@@ -42,7 +42,8 @@ PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, StringRef CPU,
                                    Reloc::Model RM, CodeModel::Model CM,
                                    CodeGenOpt::Level OL, bool is64Bit)
     : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
-      Subtarget(TT, CPU, FS, *this, is64Bit, OL), TSInfo(*this) {
+      Subtarget(TT, CPU, FS, *this, is64Bit, OL),
+      TSInfo(Subtarget.getDataLayout()) {
   initAsmInfo();
 }