add tests for missing vector icmp folds

llvm-svn: 278129

diff --git a/llvm/test/Transforms/InstCombine/cast.ll b/llvm/test/Transforms/InstCombine/cast.ll
index c4990ea..7b3c314 100644 (file)
--- a/llvm/test/Transforms/InstCombine/cast.ll
+++ b/llvm/test/Transforms/InstCombine/cast.ll
@@ -387,7 +387,6 @@ define i16 @test35(i16 %a) {
   ret i16 %c2
 }
 
-; icmp sgt i32 %a, -1
 ; rdar://6480391
 define i1 @test36(i32 %a) {
 ; CHECK-LABEL: @test36(
@@ -400,7 +399,20 @@ define i1 @test36(i32 %a) {
   ret i1 %d
 }
 
-; ret i1 false
+; FIXME: Vectors should fold too.
+define <2 x i1> @test36vec(<2 x i32> %a) {
+; CHECK-LABEL: @test36vec(
+; CHECK-NEXT:    [[B:%.*]] = lshr <2 x i32> %a, <i32 31, i32 31>
+; CHECK-NEXT:    [[C:%.*]] = trunc <2 x i32> [[B]] to <2 x i8>
+; CHECK-NEXT:    [[D:%.*]] = icmp eq <2 x i8> [[C]], zeroinitializer
+; CHECK-NEXT:    ret <2 x i1> [[D]]
+;
+  %b = lshr <2 x i32> %a, <i32 31, i32 31>
+  %c = trunc <2 x i32> %b to <2 x i8>
+  %d = icmp eq <2 x i8> %c, zeroinitializer
+  ret <2 x i1> %d
+}
+
 define i1 @test37(i32 %a) {
 ; CHECK-LABEL: @test37(
 ; CHECK-NEXT:    ret i1 false

diff --git a/llvm/test/Transforms/InstCombine/compare-signs.ll b/llvm/test/Transforms/InstCombine/compare-signs.ll
index 08bf61a..f8a8b04 100644 (file)
--- a/llvm/test/Transforms/InstCombine/compare-signs.ll
+++ b/llvm/test/Transforms/InstCombine/compare-signs.ll
@@ -93,3 +93,24 @@ define i1 @test4c(i64 %a) {
   %c = icmp slt i32 %signum.trunc, 1
   ret i1 %c
 }
+
+; FIXME: Vectors should fold too.
+define <2 x i1> @test4c_vec(<2 x i64> %a) {
+; CHECK-LABEL: @test4c_vec(
+; CHECK-NEXT:    [[L:%.*]] = ashr <2 x i64> %a, <i64 63, i64 63>
+; CHECK-NEXT:    [[NA:%.*]] = sub <2 x i64> zeroinitializer, %a
+; CHECK-NEXT:    [[R:%.*]] = lshr <2 x i64> [[NA]], <i64 63, i64 63>
+; CHECK-NEXT:    [[SIGNUM:%.*]] = or <2 x i64> [[L]], [[R]]
+; CHECK-NEXT:    [[SIGNUM_TRUNC:%.*]] = trunc <2 x i64> [[SIGNUM]] to <2 x i32>
+; CHECK-NEXT:    [[C:%.*]] = icmp slt <2 x i32> [[SIGNUM_TRUNC]], <i32 1, i32 1>
+; CHECK-NEXT:    ret <2 x i1> [[C]]
+;
+  %l = ashr <2 x i64> %a, <i64 63, i64 63>
+  %na = sub <2 x i64> zeroinitializer, %a
+  %r = lshr <2 x i64> %na, <i64 63, i64 63>
+  %signum = or <2 x i64> %l, %r
+  %signum.trunc = trunc <2 x i64> %signum to <2 x i32>
+  %c = icmp slt <2 x i32> %signum.trunc, <i32 1, i32 1>
+  ret <2 x i1> %c
+}
+