RISC-V: Mark fsX as call clobbered when soft-float.
authorAndrew Waterman <andrew@sifive.com>
Wed, 17 Jan 2018 19:07:20 +0000 (19:07 +0000)
committerJim Wilson <wilson@gcc.gnu.org>
Wed, 17 Jan 2018 19:07:20 +0000 (11:07 -0800)
2018-01-17  Andrew Waterman  <andrew@sifive.com>
gcc/
* config/riscv/riscv.c (riscv_conditional_register_usage): If
UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.

From-SVN: r256811

gcc/ChangeLog
gcc/config/riscv/riscv.c

index 7b0146b..1943210 100644 (file)
@@ -1,3 +1,8 @@
+2018-01-17  Andrew Waterman  <andrew@sifive.com>
+
+       * config/riscv/riscv.c (riscv_conditional_register_usage): If
+       UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
+
 2018-01-17  David Malcolm  <dmalcolm@redhat.com>
 
        PR lto/83121
index 19a01e0..20660a4 100644 (file)
@@ -4123,6 +4123,13 @@ riscv_conditional_register_usage (void)
       for (int regno = FP_REG_FIRST; regno <= FP_REG_LAST; regno++)
        fixed_regs[regno] = call_used_regs[regno] = 1;
     }
+
+  /* In the soft-float ABI, there are no callee-saved FP registers.  */
+  if (UNITS_PER_FP_ARG == 0)
+    {
+      for (int regno = FP_REG_FIRST; regno <= FP_REG_LAST; regno++)
+       call_used_regs[regno] = 1;
+    }
 }
 
 /* Return a register priority for hard reg REGNO.  */