ARM: dts: imx6qdl-tqma6: Fix the SPI chipselect polarity
authorFabio Estevam <festevam@gmail.com>
Fri, 16 Jul 2021 13:36:58 +0000 (10:36 -0300)
committerShawn Guo <shawnguo@kernel.org>
Wed, 22 Sep 2021 03:09:47 +0000 (11:09 +0800)
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:

[    4.854337] m25p80@0 enforce active low on chipselect handle

Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.

The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:

* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.

To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx6qdl-tqma6.dtsi

index b18b83ac6aee55a78b9a45538875c8aaa7f6255a..51a3a5392c952bef1524421f76dae7a61d768a6e 100644 (file)
@@ -20,7 +20,7 @@
 &ecspi1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_ecspi1>;
-       cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
+       cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
        status = "okay";
 
        m25p80: flash@0 {