ARM: tegra: convert sched_clock() to use new infrastructure

Convert tegra to use the new sched_clock() infrastructure for extending
32bit counters to full 64-bit nanoseconds.

Tested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0e1a966..ec7b027 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -570,6 +570,7 @@ config ARCH_TEGRA
        select GENERIC_CLOCKEVENTS
        select GENERIC_GPIO
        select HAVE_CLK
+       select HAVE_SCHED_CLOCK
        select COMMON_CLKDEV
        select ARCH_HAS_BARRIERS if CACHE_L2X0
        select ARCH_HAS_CPUFREQ

diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index c52bd84..7b8ad1f 100644 (file)
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -26,10 +26,10 @@
 #include <linux/clocksource.h>
 #include <linux/clk.h>
 #include <linux/io.h>
-#include <linux/cnt32_to_63.h>
 
 #include <asm/mach/time.h>
 #include <asm/localtimer.h>
+#include <asm/sched_clock.h>
 
 #include <mach/iomap.h>
 #include <mach/irqs.h>
@@ -111,9 +111,25 @@ static struct clocksource tegra_clocksource = {
        .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
+static DEFINE_CLOCK_DATA(cd);
+
+/*
+ * Constants generated by clocks_calc_mult_shift(m, s, 1MHz, NSEC_PER_SEC, 60).
+ * This gives a resolution of about 1us and a wrap period of about 1h11min.
+ */
+#define SC_MULT                4194304000u
+#define SC_SHIFT       22
+
 unsigned long long notrace sched_clock(void)
 {
-       return cnt32_to_63(timer_readl(TIMERUS_CNTR_1US)) * 1000;
+       u32 cyc = timer_readl(TIMERUS_CNTR_1US);
+       return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
+}
+
+static void notrace tegra_update_sched_clock(void)
+{
+       u32 cyc = timer_readl(TIMERUS_CNTR_1US);
+       update_sched_clock(&cd, cyc, (u32)~0);
 }
 
 static irqreturn_t tegra_timer_interrupt(int irq, void *dev_id)
@@ -158,6 +174,9 @@ static void __init tegra_init_timer(void)
                WARN(1, "Unknown clock rate");
        }
 
+       init_fixed_sched_clock(&cd, tegra_update_sched_clock, 32,
+                              1000000, SC_MULT, SC_SHIFT);
+
        if (clocksource_register_hz(&tegra_clocksource, 1000000)) {
                printk(KERN_ERR "Failed to register clocksource\n");
                BUG();