rockchip: pwm: fix the register layout for the PWM controller
authoreric.gao@rock-chips.com <eric.gao@rock-chips.com>
Mon, 19 Jun 2017 06:45:36 +0000 (14:45 +0800)
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tue, 11 Jul 2017 10:13:47 +0000 (12:13 +0200)
According to rk3288 spec, the pwm register order is:
    PWM_PWM0_CNT,
    PWM_PWM0_PERIOD_HPR,
    PWM_PWM0_DUTY_LPR,
    PWM_PWM0_CTRL
but the source code's order is:
  struct rk3288_pwm {
    u32 cnt;
    u32 duty_lpr;
    u32 period_hpr;
    u32 ctrl;
  };

So, correct it here. It is the same as RK3399.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Edited the commit message:
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
arch/arm/include/asm/arch-rockchip/pwm.h

index 5d9a178..08ff945 100644 (file)
@@ -10,8 +10,8 @@
 
 struct rk3288_pwm {
        u32 cnt;
-       u32 duty_lpr;
        u32 period_hpr;
+       u32 duty_lpr;
        u32 ctrl;
 };
 check_member(rk3288_pwm, ctrl, 0xc);