[X86] Add MSRLIST instructions.

For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Reviewed By: skan, RKSimon

Differential Revision: https://reviews.llvm.org/D135934

diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index 292efe0..1969092 100644 (file)
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -136,6 +136,8 @@ Changes to the Windows Target
 Changes to the X86 Backend
 --------------------------
 
+* Add support for the ``RDMSRLIST and WRMSRLIST`` instructions.
+
 Changes to the OCaml bindings
 -----------------------------
 

diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td
index b1ca872..96bb6e3 100644 (file)
--- a/llvm/lib/Target/X86/X86InstrSystem.td
+++ b/llvm/lib/Target/X86/X86InstrSystem.td
@@ -428,6 +428,11 @@ def WRMSR : I<0x30, RawFrm, (outs), (ins), "wrmsr", []>, TB;
 let Defs = [EAX, EDX], Uses = [ECX] in
 def RDMSR : I<0x32, RawFrm, (outs), (ins), "rdmsr", []>, TB;
 
+let Uses = [RSI, RDI, RCX], Predicates = [In64BitMode] in {
+def WRMSRLIST : I<0x01, MRM_C6, (outs), (ins), "wrmsrlist", []>, XS;
+def RDMSRLIST : I<0x01, MRM_C6, (outs), (ins), "rdmsrlist", []>, XD;
+}
+
 let Defs = [RAX, RDX], Uses = [ECX] in
 def RDPMC : I<0x33, RawFrm, (outs), (ins), "rdpmc", []>, TB;
 

diff --git a/llvm/test/MC/Disassembler/X86/x86-64-msrlist.txt b/llvm/test/MC/Disassembler/X86/x86-64-msrlist.txt
new file mode 100644 (file)
index 0000000..ce01a71
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/x86-64-msrlist.txt
@@ -0,0 +1,10 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT:   rdmsrlist
+# INTEL: rdmsrlist
+0xf2,0x0f,0x01,0xc6
+
+# ATT:   wrmsrlist
+# INTEL: wrmsrlist
+0xf3,0x0f,0x01,0xc6

diff --git a/llvm/test/MC/X86/x86-64-msrlist.s b/llvm/test/MC/X86/x86-64-msrlist.s
new file mode 100644 (file)
index 0000000..7e78661
--- /dev/null
+++ b/llvm/test/MC/X86/x86-64-msrlist.s
@@ -0,0 +1,10 @@
+// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: rdmsrlist
+// CHECK: encoding: [0xf2,0x0f,0x01,0xc6]
+          rdmsrlist
+
+// CHECK: wrmsrlist
+// CHECK: encoding: [0xf3,0x0f,0x01,0xc6]
+          wrmsrlist