radv: set correct value for OFFCHIP_BUFFERING on GFX10+

Higher values break tessellation. I was only able to reproduce this
by switching back/from AMDVLK which was really weird...

According to Marek (1c6eca23fdd8), it looks like it's related to
register shadowing and PAL enables it, that probably explains a bit.

Copied from PAL and RadeonSI.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4207
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2498
Fixes: 74d69299d16 ("radv/gfx10: double the number of tessellation offchip buffers per SE")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9141>

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index bb16a7c..cc91774 100644 (file)
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -3417,7 +3417,7 @@ radv_get_hs_offchip_param(struct radv_device *device, uint32_t *max_offchip_buff
         * Follow AMDVLK here.
         */
        if (device->physical_device->rad_info.chip_class >= GFX10) {
-               max_offchip_buffers_per_se = 256;
+               max_offchip_buffers_per_se = 128;
        } else if (device->physical_device->rad_info.family == CHIP_VEGA10 ||
                   device->physical_device->rad_info.chip_class == GFX7 ||
                   device->physical_device->rad_info.chip_class == GFX6)