Daily bump.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 118cfe0..e79c77c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,68 @@
+2022-06-09  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
+
+       * config/xtensa/xtensa.md (clrsbsi2): New insn pattern.
+
+2022-06-09  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
+
+       * config/xtensa/xtensa.md (*andsi3_bitcmpl):
+       New insn_and_split pattern.
+
+2022-06-09  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
+
+       * config/xtensa/xtensa.md (one_cmplsi2):
+       Rearrange as an insn_and_split pattern.
+
+2022-06-09  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
+
+       * config/xtensa/xtensa.md (bswaphi2): New insn pattern.
+
+2022-06-09  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * config/rs6000/rs6000.md (FP_ISA3): Delete.
+       (float<QHI:mode><FP_ISA3:mode>2): Rename to...
+       (float<QHI:mode><SFDF:mode>2): ... this.  Adjust.
+       (*float<QHI:mode><FP_ISA3:mode>2_internal): Rename to...
+       (*float<QHI:mode><SFDF:mode>2_internal): ... this.  Adjust.
+       (floatuns<QHI:mode><FP_ISA3:mode>2): Rename to...
+       (floatuns<QHI:mode><SFDF:mode>2): ... this.  Adjust.
+       (*floatuns<QHI:mode><FP_ISA3:mode>2_internal): Rename to...
+       (*floatuns<QHI:mode><SFDF:mode>2_internal): ... this.  Adjust.
+
+2022-06-09  Maciej W. Rozycki  <macro@embecosm.com>
+
+       * config/riscv/riscv.md
+       (*f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_default)
+       (*f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_snan): Emit a tab
+       rather than space with FSFLAGS.
+
+2022-06-09  Tobias Burnus  <tobias@codesourcery.com>
+
+       * omp-offload.cc (omp_discover_declare_target_tgt_fn_r,
+       omp_discover_declare_target_fn_r): Don't walk reverse-offload
+       target regions.
+
+2022-06-09  Jakub Jelinek  <jakub@redhat.com>
+
+       * doc/invoke.texi (-Waddress): Fix a typo in small example.
+       Fix typos inptr_t -> intptr_t and uinptr_t -> uintptr_t.
+
+2022-06-09  Cui,Lili  <lili.cui@intel.com>
+
+       PR target/105493
+       * config/i386/x86-tune-costs.h (skylake_cost): Raise the gpr load cost
+       from 4 to 6 and gpr store cost from 6 to 8. Change SSE loads and
+       unaligned loads cost from {6, 6, 6, 10, 20} to {8, 8, 8, 8, 16}.
+       (icelake_cost): Ditto.
+       (alderlake_cost): Raise the gpr store cost from 6 to 8 and SSE loads,
+       stores and unaligned stores cost from {6, 6, 6, 10, 15} to
+       {8, 8, 8, 10, 15}.
+
+2022-06-09  Haochen Gui  <guihaoc@gcc.gnu.org>
+
+       * config/rs6000/rs6000.md (define_split for bswapdi load): Merge shift
+       and ior insns to one rotate and mask insn.
+       (define_split for bswapdi register): Likewise.
+
 2022-06-08  Roger Sayle  <roger@nextmovesoftware.com>
 
        PR middle-end/105874

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 2b282de..b317785 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20220609
+20220610

diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 08b8d28..0482af7 100644 (file)
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,26 @@
+2022-06-09  Jakub Jelinek  <jakub@redhat.com>
+
+       PR c++/105871
+       * constexpr.cc (cxx_eval_bit_field_ref): For BIT_FIELD_REF with
+       non-integral result type use fold_ternary too like for BIT_FIELD_REFs
+       from VECTOR_CST.  If fold_ternary returns NULL, diagnose non-constant
+       expression, set *non_constant_p and return t, instead of returning
+       NULL.
+
+2022-06-09  Nathan Sidwell  <nathan@acm.org>
+
+       * cp-tree.h (module_initializer_kind): Replace with ...
+       (module_global_init_needed, module_has_import_inits): ...
+       these.
+       * decl2.cc (start_objects): Add has_body parm.  Reorganize
+       module initializer creation.
+       (generate_ctor_or_dtor_function): Adjust.
+       (c_parse_final_cleanups): Adjust.
+       (vtv_start_verification_constructor_init_function): Adjust.
+       * module.cc (module_initializer_kind): Replace with ...
+       (module_global_init_needed, module_has_import_inits): ...
+       these.
+
 2022-06-08  Jason Merrill  <jason@redhat.com>
 
        PR c++/105852

diff --git a/gcc/po/ChangeLog b/gcc/po/ChangeLog
index d1fad8f..4443b48 100644 (file)
--- a/gcc/po/ChangeLog
+++ b/gcc/po/ChangeLog
@@ -1,3 +1,7 @@
+2022-06-09  Joseph Myers  <joseph@codesourcery.com>
+
+       * sv.po: Update.
+
 2022-05-10  Joseph Myers  <joseph@codesourcery.com>
 
        * hr.po: Update.

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 443e1c8..6172934 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,38 @@
+2022-06-09  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
+
+       * gcc.target/xtensa/check_zero_byte.c: New.
+
+2022-06-09  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
+
+       * gcc.target/xtensa/one_cmpl_abs.c: New.
+
+2022-06-09  Jakub Jelinek  <jakub@redhat.com>
+
+       PR c++/105871
+       * g++.dg/pr105871.C: New test.
+
+2022-06-09  Nathan Sidwell  <nathan@acm.org>
+
+       * g++.dg/modules/init-2_a.C: Check no idempotency.
+       * g++.dg/modules/init-2_b.C: Check idempotency.
+
+2022-06-09  Tobias Burnus  <tobias@codesourcery.com>
+
+       * c-c++-common/gomp/reverse-offload-1.c: New.
+
+2022-06-09  Cui,Lili  <lili.cui@intel.com>
+
+       PR target/105493
+       * gcc.target/i386/pr91446.c: Adjust to expect vectorization
+       * gcc.target/i386/pr99881.c: XFAIL.
+       * gcc.target/i386/pr105493.c: New.
+       * g++.target/i386/pr105638.C: Use other sequence checks
+       instead of vpxor, because code generation changed.
+
+2022-06-09  Haochen Gui  <guihaoc@gcc.gnu.org>
+
+       * gcc.target/powerpc/pr93453-1.c: New.
+
 2022-06-08  Jason Merrill  <jason@redhat.com>
 
        PR c++/105852

diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index 6e858b5..88c860b 100644 (file)
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,8 @@
+2022-06-09  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
+
+       * config/xtensa/lib1funcs.S (__clrsbsi2): New function.
+       * config/xtensa/t-xtensa (LIB1ASMFUNCS): Add _clrsbsi2.
+
 2022-06-01  H.J. Lu  <hjl.tools@gmail.com>
 
        PR libgcc/27576

diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog
index 39d9277..46a747d 100644 (file)
--- a/libgomp/ChangeLog
+++ b/libgomp/ChangeLog
@@ -1,3 +1,22 @@
+2022-06-09  Jakub Jelinek  <jakub@redhat.com>
+
+       * config/linux/allocator.c: Fix up #include directive.
+
+2022-06-09  Jakub Jelinek  <jakub@redhat.com>
+
+       * allocator.c: Include dlfcn.h if LIBGOMP_USE_MEMKIND is defined.
+       (enum gomp_memkind_kind): New type.
+       (struct omp_allocator_data): Add memkind field if LIBGOMP_USE_MEMKIND
+       is defined.
+       (struct gomp_memkind_data): New type.
+       (memkind_data, memkind_data_once): New variables.
+       (gomp_init_memkind, gomp_get_memkind): New functions.
+       (omp_init_allocator): Initialize data.memkind, don't fail for
+       omp_high_bw_mem_space if libmemkind supports it.
+       (omp_aligned_alloc, omp_free, omp_aligned_calloc, omp_realloc): Add
+       memkind support of LIBGOMP_USE_MEMKIND is defined.
+       * config/linux/allocator.c: New file.
+
 2022-06-03  Tobias Burnus  <tobias@codesourcery.com>
 
        * libgomp.texi (OpenMP 5.2): Mark scope w/ firstprivate/allocate as Y.