Fix Linaro PR #902
Partial Backport from trunk r211798.
2014-06-18 Radovan Obradovic <robradovic@mips.com>
Tom de Vries <tom@codesourcery.com>
* config/arm/arm.c (arm_emit_call_insn): Add IP and CC clobbers to
CALL_INSN_FUNCTION_USAGE.
Backport from trunk r209800.
2014-04-25 Tom de Vries <tom@codesourcery.com>
* expr.c (clobber_reg_mode): New function.
* expr.h (clobber_reg): New function.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219597
138bc75d-0d04-0410-961f-
82ee72b054a4
2015-01-14 Yvan Roux <yvan.roux@linaro.org>
+ Fix Linaro PR #902
+
+ Partial Backport from trunk r211798.
+ 2014-06-18 Radovan Obradovic <robradovic@mips.com>
+ Tom de Vries <tom@codesourcery.com>
+
+ * config/arm/arm.c (arm_emit_call_insn): Add IP and CC clobbers to
+ CALL_INSN_FUNCTION_USAGE.
+
+ Backport from trunk r209800.
+ 2014-04-25 Tom de Vries <tom@codesourcery.com>
+
+ * expr.c (clobber_reg_mode): New function.
+ * expr.h (clobber_reg): New function.
+
+2015-01-14 Yvan Roux <yvan.roux@linaro.org>
+
Backport from trunk r211783.
2014-06-18 Charles Baylis <charles.baylis@linaro.org>
require_pic_register ();
use_reg (&CALL_INSN_FUNCTION_USAGE (insn), cfun->machine->pic_reg);
}
+
+ if (TARGET_AAPCS_BASED)
+ {
+ /* For AAPCS, IP and CC can be clobbered by veneers inserted by the
+ linker. */
+ rtx *fusage = &CALL_INSN_FUNCTION_USAGE (insn);
+ clobber_reg (fusage, gen_rtx_REG (word_mode, IP_REGNUM));
+ clobber_reg (fusage, gen_rtx_REG (word_mode, CC_REGNUM));
+ }
}
/* Output a 'call' insn. */
= gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
}
+/* Add a CLOBBER expression for REG to the (possibly empty) list pointed
+ to by CALL_FUSAGE. REG must denote a hard register. */
+
+void
+clobber_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
+{
+ gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
+
+ *call_fusage
+ = gen_rtx_EXPR_LIST (mode, gen_rtx_CLOBBER (VOIDmode, reg), *call_fusage);
+}
+
/* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
starting at REGNO. All of these registers must be hard registers. */
/* Mark REG as holding a parameter for the next CALL_INSN.
Mode is TYPE_MODE of the non-promoted parameter, or VOIDmode. */
extern void use_reg_mode (rtx *, rtx, enum machine_mode);
+extern void clobber_reg_mode (rtx *, rtx, enum machine_mode);
extern rtx copy_blkmode_to_reg (enum machine_mode, tree);
use_reg_mode (fusage, reg, VOIDmode);
}
+/* Mark REG as clobbered by the call with FUSAGE as CALL_INSN_FUNCTION_USAGE. */
+static inline void
+clobber_reg (rtx *fusage, rtx reg)
+{
+ clobber_reg_mode (fusage, reg, VOIDmode);
+}
+
/* Mark NREGS consecutive regs, starting at REGNO, as holding parameters
for the next CALL_INSN. */
extern void use_regs (rtx *, int, int);