#ifdef CONFIG_USB_EHCI_HCD
{
- /* FIXME: the current clk driver can not handle parents */
- u32 tmp;
int ch;
- tmp = readl(SC_CLKCTRL4);
- tmp |= BIT(10) | BIT(8); /* MIO, STDMAC */
- writel(tmp, SC_CLKCTRL4);
-
for (ch = 0; ch < 3; ch++) {
void __iomem *phyctrl = (void __iomem *)SG_USBPHYCTRL;
/* provide clocks */
tmp = readl(SC_CLKCTRL);
-#ifdef CONFIG_USB_EHCI_HCD
- tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
-#endif
#ifdef CONFIG_NAND_DENALI
tmp |= SC_CLKCTRL_CEN_NAND;
#endif
tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
SC_CLKCTRL_CEN_GIO;
#endif
-#ifdef CONFIG_USB_EHCI_HCD
- tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
-#endif
#ifdef CONFIG_NAND_DENALI
tmp |= SC_CLKCTRL_CEN_NAND;
#endif
#define SC_RSTCTRL_NRST_USB3B0 (0x1 << 17) /* USB3 #0 bus */
#define SC_RSTCTRL_NRST_USB3C0 (0x1 << 16) /* USB3 #0 core */
#define SC_RSTCTRL_NRST_ETHER (0x1 << 12)
-#define SC_RSTCTRL_NRST_STDMAC (0x1 << 10)
#define SC_RSTCTRL_NRST_GIO (0x1 << 6)
/* Pro4 or older */
#define SC_RSTCTRL_NRST_UMC1 (0x1 << 5)
#define SC_CLKCTRL_CEN_USB31 (0x1 << 17) /* USB3 #1 */
#define SC_CLKCTRL_CEN_USB30 (0x1 << 16) /* USB3 #0 */
#define SC_CLKCTRL_CEN_ETHER (0x1 << 12)
-#define SC_CLKCTRL_CEN_MIO (0x1 << 11)
-#define SC_CLKCTRL_CEN_STDMAC (0x1 << 10)
#define SC_CLKCTRL_CEN_GIO (0x1 << 6)
/* Pro4 or older */
#define SC_CLKCTRL_CEN_UMC (0x1 << 4)