compatible = "arm,cortex-a55";
reg = <0x000>;
enable-method = "psci";
+ performance-domains = <&performance 0>;
clock-frequency = <1701000000>;
capacity-dmips-mhz = <578>;
cpu-idle-states = <&cpu_off_l &cluster_off_l>;
compatible = "arm,cortex-a55";
reg = <0x100>;
enable-method = "psci";
+ performance-domains = <&performance 0>;
clock-frequency = <1701000000>;
capacity-dmips-mhz = <578>;
cpu-idle-states = <&cpu_off_l &cluster_off_l>;
compatible = "arm,cortex-a55";
reg = <0x200>;
enable-method = "psci";
+ performance-domains = <&performance 0>;
clock-frequency = <1701000000>;
capacity-dmips-mhz = <578>;
cpu-idle-states = <&cpu_off_l &cluster_off_l>;
compatible = "arm,cortex-a55";
reg = <0x300>;
enable-method = "psci";
+ performance-domains = <&performance 0>;
clock-frequency = <1701000000>;
capacity-dmips-mhz = <578>;
cpu-idle-states = <&cpu_off_l &cluster_off_l>;
compatible = "arm,cortex-a78";
reg = <0x400>;
enable-method = "psci";
+ performance-domains = <&performance 1>;
clock-frequency = <2171000000>;
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&cpu_off_b &cluster_off_b>;
compatible = "arm,cortex-a78";
reg = <0x500>;
enable-method = "psci";
+ performance-domains = <&performance 1>;
clock-frequency = <2171000000>;
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&cpu_off_b &cluster_off_b>;
compatible = "arm,cortex-a78";
reg = <0x600>;
enable-method = "psci";
+ performance-domains = <&performance 1>;
clock-frequency = <2171000000>;
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&cpu_off_b &cluster_off_b>;
compatible = "arm,cortex-a78";
reg = <0x700>;
enable-method = "psci";
+ performance-domains = <&performance 1>;
clock-frequency = <2171000000>;
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&cpu_off_b &cluster_off_b>;
clock-output-names = "clk32k";
};
+ performance: performance-controller@11bc10 {
+ compatible = "mediatek,cpufreq-hw";
+ reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;
+ #performance-domain-cells = <1>;
+ };
+
pmu-a55 {
compatible = "arm,cortex-a55-pmu";
interrupt-parent = <&gic>;