CONFIG_ARM_ERRATA_742230
CONFIG_ARM_ERRATA_743622
CONFIG_ARM_ERRATA_751472
- CONFIG_ARM_ERRATA_794072
CONFIG_ARM_ERRATA_761320
+ CONFIG_ARM_ERRATA_773022
+ CONFIG_ARM_ERRATA_774769
+ CONFIG_ARM_ERRATA_794072
If set, the workarounds for these ARM errata are applied early
during U-Boot startup. Note that these options force the
bl psci_arch_init
#endif
+#ifdef CONFIG_ARM_ERRATA_773022
+ mrc p15, 0, r5, c1, c0, 1
+ orr r5, r5, #(1 << 1)
+ mcr p15, 0, r5, c1, c0, 1
+ isb
+#endif
+
+#ifdef CONFIG_ARM_ERRATA_774769
+ mrc p15, 0, r5, c1, c0, 1
+ orr r5, r5, #(1 << 25)
+ mcr p15, 0, r5, c1, c0, 1
+ isb
+#endif
+
mrc p15, 0, r5, c1, c1, 0 @ read SCR
bic r5, r5, #0x4a @ clear IRQ, EA, nET bits
orr r5, r5, #0x31 @ enable NS, AW, FW bits
/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
#define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000
+/* CPU Errata */
+#define CONFIG_ARM_ERRATA_773022
+#define CONFIG_ARM_ERRATA_774769
+
/* Power */
#define CONFIG_POWER
#define CONFIG_POWER_I2C