<value name="VFMT_2_10_10_10_UNORM" value="0x3d"/>
<value name="VFMT_2_10_10_10_SINT" value="0x3e"/>
<value name="VFMT_2_10_10_10_SNORM" value="0x3f"/>
+
+ <value name="VFMT_NONE" value="0xff"/>
</enum>
<enum name="a3xx_tex_fmt">
<value name="TFMT_ETC2_RGBA8" value="0x74"/>
<value name="TFMT_ETC2_RGB8A1" value="0x75"/>
<value name="TFMT_ETC2_RGB8" value="0x76"/>
+
+ <value name="TFMT_NONE" value="0xff"/>
</enum>
<enum name="a3xx_tex_fetchsize">
<value name="RB_R32_UINT" value="0x38"/>
<value name="RB_R32G32_UINT" value="0x39"/>
<value name="RB_R32G32B32A32_UINT" value="0x3b"/>
+
+ <value name="RB_NONE" value="0xff"/>
</enum>
<enum name="a3xx_cp_perfcounter_select">
<value name="RB4_R32G32B32A32_FLOAT" value="0x3c"/>
<value name="RB4_R32G32B32A32_UINT" value="0x3d"/>
<value name="RB4_R32G32B32A32_SINT" value="0x3e"/>
+
+ <value name="RB4_NONE" value="0xff"/>
</enum>
<enum name="a4xx_tile_mode">
<value name="VFMT4_2_10_10_10_UNORM" value="0x3d"/>
<value name="VFMT4_2_10_10_10_SINT" value="0x3e"/>
<value name="VFMT4_2_10_10_10_SNORM" value="0x3f"/>
+
+ <value name="VFMT4_NONE" value="0xff"/>
</enum>
<enum name="a4xx_tex_fmt">
<value name="TFMT4_ASTC_12x10" value="0x7b"/>
<value name="TFMT4_ASTC_12x12" value="0x7c"/>
<!-- 0x7d .. 0x7f -->
+
+ <value name="TFMT4_NONE" value="0xff"/>
</enum>
<enum name="a4xx_tex_fetchsize">
<value value="0x82" name="RB5_R32G32B32A32_FLOAT"/>
<value value="0x83" name="RB5_R32G32B32A32_UINT"/>
<value value="0x84" name="RB5_R32G32B32A32_SINT"/>
+
+ <value value="0xff" name="RB5_NONE"/>
</enum>
<enum name="a5xx_tile_mode">
<value value="0x83" name="VFMT5_32_32_32_32_UINT"/>
<value value="0x84" name="VFMT5_32_32_32_32_SINT"/>
<value value="0x85" name="VFMT5_32_32_32_32_FIXED"/>
+
+ <value value="0xff" name="VFMT5_NONE"/>
</enum>
<enum name="a5xx_tex_fmt">
<value value="0xcc" name="TFMT5_ASTC_10x10"/>
<value value="0xcd" name="TFMT5_ASTC_12x10"/>
<value value="0xce" name="TFMT5_ASTC_12x12"/>
+
+ <value value="0xff" name="TFMT5_NONE"/>
</enum>
<enum name="a5xx_tex_fetchsize">
<!-- same as X8Z24_UNORM but for sampling stencil (integer, 2nd channel) -->
<value value="0xea" name="FMT6_S8Z24_UINT"/>
+
+ <!-- Not a hw enum, used internally in driver -->
+ <value value="0xff" name="FMT6_NONE"/>
+
</enum>
<enum name="a6xx_tex_fetchsize">
#include "vk_util.h"
#include "drm-uapi/drm_fourcc.h"
-#define FMT6_x -1
-
#define TU6_FMT(vkfmt, hwfmt, swapfmt, valid) \
[VK_FORMAT_##vkfmt] = { \
.fmt = FMT6_##hwfmt, \
#define TU6_xTC(vk, fmt, swap) TU6_FMT(vk, fmt, swap, FMT_TEXTURE | FMT_COLOR)
#define TU6_Vxx(vk, fmt, swap) TU6_FMT(vk, fmt, swap, FMT_VERTEX)
#define TU6_xTx(vk, fmt, swap) TU6_FMT(vk, fmt, swap, FMT_TEXTURE)
-#define TU6_xxx(vk, fmt, swap) TU6_FMT(vk, x, WZYX, false)
+#define TU6_xxx(vk, fmt, swap) TU6_FMT(vk, NONE, WZYX, 0)
static const struct tu_native_format tu6_format_table[] = {
TU6_xxx(UNDEFINED, x, x), /* 0 */
#include "a2xx.xml.h"
struct surface_format {
-#define FMT_INVALID 0x7f
+/* If enum is a signed type, 0x7f is out of range. Cast it to avoid warnings. */
+#define FMT_INVALID ((enum a2xx_sq_surfaceformat) 0x7f)
enum a2xx_sq_surfaceformat format : 7;
enum sq_tex_sign sign : 2;
enum sq_tex_num_format num_format : 1;
continue;
#endif
- debug_assert(fmt != ~0);
+ debug_assert(fmt != VFMT_NONE);
OUT_PKT0(ring, REG_A3XX_VFD_FETCH(j), 2);
OUT_RING(ring, A3XX_VFD_FETCH_INSTR_0_FETCHSIZE(fs - 1) |
boolean present;
};
-#define RB_NONE ~0
-
/* vertex + texture */
#define VT(pipe, fmt, rbfmt, swapfmt) \
[PIPE_FORMAT_ ## pipe] = { \
#define _T(pipe, fmt, rbfmt, swapfmt) \
[PIPE_FORMAT_ ## pipe] = { \
.present = 1, \
- .vtx = ~0, \
+ .vtx = VFMT_NONE, \
.tex = TFMT_ ## fmt, \
.rb = RB_ ## rbfmt, \
.swap = swapfmt \
[PIPE_FORMAT_ ## pipe] = { \
.present = 1, \
.vtx = VFMT_ ## fmt, \
- .tex = ~0, \
+ .tex = TFMT_NONE, \
.rb = RB_ ## rbfmt, \
.swap = swapfmt \
}
fd3_pipe2vtx(enum pipe_format format)
{
if (!formats[format].present)
- return ~0;
+ return VFMT_NONE;
return formats[format].vtx;
}
fd3_pipe2tex(enum pipe_format format)
{
if (!formats[format].present)
- return ~0;
+ return TFMT_NONE;
return formats[format].tex;
}
fd3_pipe2color(enum pipe_format format)
{
if (!formats[format].present)
- return ~0;
+ return RB_NONE;
return formats[format].rb;
}
{
enum a3xx_color_fmt fmt = fd3_pipe2color(pfmt);
- if (fmt == ~0)
+ if (fmt == RB_NONE)
return false;
switch (pfmt) {
return false;
if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
- (fd3_pipe2vtx(format) != (enum a3xx_vtx_fmt)~0)) {
+ (fd3_pipe2vtx(format) != VFMT_NONE)) {
retval |= PIPE_BIND_VERTEX_BUFFER;
}
if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
- (fd3_pipe2tex(format) != (enum a3xx_tex_fmt)~0)) {
+ (fd3_pipe2tex(format) != TFMT_NONE)) {
retval |= PIPE_BIND_SAMPLER_VIEW;
}
PIPE_BIND_SCANOUT |
PIPE_BIND_SHARED |
PIPE_BIND_BLENDABLE)) &&
- (fd3_pipe2color(format) != (enum a3xx_color_fmt)~0) &&
- (fd3_pipe2tex(format) != (enum a3xx_tex_fmt)~0)) {
+ (fd3_pipe2color(format) != RB_NONE) &&
+ (fd3_pipe2tex(format) != TFMT_NONE)) {
retval |= usage & (PIPE_BIND_RENDER_TARGET |
PIPE_BIND_DISPLAY_TARGET |
PIPE_BIND_SCANOUT |
if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
(fd_pipe2depth(format) != (enum adreno_rb_depth_format)~0) &&
- (fd3_pipe2tex(format) != (enum a3xx_tex_fmt)~0)) {
+ (fd3_pipe2tex(format) != TFMT_NONE)) {
retval |= PIPE_BIND_DEPTH_STENCIL;
}
uint32_t fs = util_format_get_blocksize(pfmt);
uint32_t off = vb->buffer_offset + elem->src_offset;
uint32_t size = fd_bo_size(rsc->bo) - off;
- debug_assert(fmt != ~0);
+ debug_assert(fmt != VFMT4_NONE);
#ifdef DEBUG
/* see dEQP-GLES31.stress.vertex_attribute_binding.buffer_bounds.bind_vertex_buffer_offset_near_wrap_10
boolean present;
};
-#define RB4_NONE ~0
-
/* vertex + texture */
#define VT(pipe, fmt, rbfmt, swapfmt) \
[PIPE_FORMAT_ ## pipe] = { \
#define _T(pipe, fmt, rbfmt, swapfmt) \
[PIPE_FORMAT_ ## pipe] = { \
.present = 1, \
- .vtx = ~0, \
+ .vtx = VFMT4_NONE, \
.tex = TFMT4_ ## fmt, \
.rb = RB4_ ## rbfmt, \
.swap = swapfmt \
[PIPE_FORMAT_ ## pipe] = { \
.present = 1, \
.vtx = VFMT4_ ## fmt, \
- .tex = ~0, \
+ .tex = TFMT4_NONE, \
.rb = RB4_ ## rbfmt, \
.swap = swapfmt \
}
break;
}
- if (fd5_pipe2color(fmt) == ~0)
+ if (fd5_pipe2color(fmt) == RB5_NONE)
return false;
return true;
bool isint = util_format_is_pure_integer(pfmt);
uint32_t off = vb->buffer_offset + elem->src_offset;
uint32_t size = fd_bo_size(rsc->bo) - off;
- debug_assert(fmt != ~0);
+ debug_assert(fmt != VFMT5_NONE);
#ifdef DEBUG
/* see dEQP-GLES31.stress.vertex_attribute_binding.buffer_bounds.bind_vertex_buffer_offset_near_wrap_10
boolean present;
};
-#define RB5_NONE ~0
-
/* vertex + texture */
#define VT(pipe, fmt, rbfmt, swapfmt) \
[PIPE_FORMAT_ ## pipe] = { \
#define _T(pipe, fmt, rbfmt, swapfmt) \
[PIPE_FORMAT_ ## pipe] = { \
.present = 1, \
- .vtx = ~0, \
+ .vtx = VFMT5_NONE, \
.tex = TFMT5_ ## fmt, \
.rb = RB5_ ## rbfmt, \
.swap = swapfmt \
[PIPE_FORMAT_ ## pipe] = { \
.present = 1, \
.vtx = VFMT5_ ## fmt, \
- .tex = ~0, \
+ .tex = TFMT5_NONE, \
.rb = RB5_ ## rbfmt, \
.swap = swapfmt \
}
fd5_pipe2vtx(enum pipe_format format)
{
if (!formats[format].present)
- return ~0;
+ return VFMT5_NONE;
return formats[format].vtx;
}
fd5_pipe2tex(enum pipe_format format)
{
if (!formats[format].present)
- return ~0;
+ return TFMT5_NONE;
return formats[format].tex;
}
fd5_pipe2color(enum pipe_format format)
{
if (!formats[format].present)
- return ~0;
+ return RB5_NONE;
return formats[format].rb;
}
return false;
if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
- (fd5_pipe2vtx(format) != (enum a5xx_vtx_fmt)~0)) {
+ (fd5_pipe2vtx(format) != VFMT5_NONE)) {
retval |= PIPE_BIND_VERTEX_BUFFER;
}
if ((usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_SHADER_IMAGE)) &&
- (fd5_pipe2tex(format) != (enum a5xx_tex_fmt)~0) &&
+ (fd5_pipe2tex(format) != TFMT5_NONE) &&
(target == PIPE_BUFFER ||
util_format_get_blocksize(format) != 12)) {
retval |= usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_SHADER_IMAGE);
PIPE_BIND_SCANOUT |
PIPE_BIND_SHARED |
PIPE_BIND_COMPUTE_RESOURCE)) &&
- (fd5_pipe2color(format) != (enum a5xx_color_fmt)~0) &&
- (fd5_pipe2tex(format) != (enum a5xx_tex_fmt)~0)) {
+ (fd5_pipe2color(format) != RB5_NONE) &&
+ (fd5_pipe2tex(format) != TFMT5_NONE)) {
retval |= usage & (PIPE_BIND_RENDER_TARGET |
PIPE_BIND_DISPLAY_TARGET |
PIPE_BIND_SCANOUT |
if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
(fd5_pipe2depth(format) != (enum a5xx_depth_format)~0) &&
- (fd5_pipe2tex(format) != (enum a5xx_tex_fmt)~0)) {
+ (fd5_pipe2tex(format) != TFMT5_NONE)) {
retval |= PIPE_BIND_DEPTH_STENCIL;
}
break;
}
- if (fmt == ~0)
+ if (fmt == FMT6_NONE)
return false;
if (fd6_ifmt(fmt) == 0)
enum pipe_format pfmt = elem->src_format;
enum a6xx_format fmt = fd6_pipe2vtx(pfmt);
bool isint = util_format_is_pure_integer(pfmt);
- debug_assert(fmt != ~0);
+ debug_assert(fmt != FMT6_NONE);
OUT_RING(ring, A6XX_VFD_DECODE_INSTR_IDX(j) |
A6XX_VFD_DECODE_INSTR_FORMAT(fmt) |
boolean present;
};
-#define FMT6_NONE ~0
-
#define FMT(pipe, vtxfmt, texfmt, rbfmt, swapfmt) \
[PIPE_FORMAT_ ## pipe] = { \
.present = 1, \
fd6_pipe2vtx(enum pipe_format format)
{
if (!formats[format].present)
- return ~0;
+ return FMT6_NONE;
return formats[format].vtx;
}
fd6_pipe2tex(enum pipe_format format)
{
if (!formats[format].present)
- return ~0;
+ return FMT6_NONE;
return formats[format].tex;
}
fd6_pipe2color(enum pipe_format format)
{
if (!formats[format].present)
- return ~0;
+ return FMT6_NONE;
return formats[format].rb;
}
return false;
if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
- (fd6_pipe2vtx(format) != (enum a6xx_format)~0)) {
+ (fd6_pipe2vtx(format) != FMT6_NONE)) {
retval |= PIPE_BIND_VERTEX_BUFFER;
}
if ((usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_SHADER_IMAGE)) &&
- (fd6_pipe2tex(format) != (enum a6xx_format)~0) &&
+ (fd6_pipe2tex(format) != FMT6_NONE) &&
(target == PIPE_BUFFER ||
util_format_get_blocksize(format) != 12)) {
retval |= usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_SHADER_IMAGE);
PIPE_BIND_SCANOUT |
PIPE_BIND_SHARED |
PIPE_BIND_COMPUTE_RESOURCE)) &&
- (fd6_pipe2color(format) != (enum a6xx_format)~0) &&
- (fd6_pipe2tex(format) != (enum a6xx_format)~0)) {
+ (fd6_pipe2color(format) != FMT6_NONE) &&
+ (fd6_pipe2tex(format) != FMT6_NONE)) {
retval |= usage & (PIPE_BIND_RENDER_TARGET |
PIPE_BIND_DISPLAY_TARGET |
PIPE_BIND_SCANOUT |
if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
(fd6_pipe2depth(format) != (enum a6xx_depth_format)~0) &&
- (fd6_pipe2tex(format) != (enum a6xx_format)~0)) {
+ (fd6_pipe2tex(format) != FMT6_NONE)) {
retval |= PIPE_BIND_DEPTH_STENCIL;
}
projects / platform / upstream / mesa.git / commitdiff