#define GPL3_CFG 0xE0300380
#define GPL4_CFG 0xE03003A0
-/* GPIO for LCD_ON */
+/* GPIO for LCD_ON */
#define GPH0_CFG 0xE0300C00
#define GPK0_DATA 0xE03002A4
SUBLCD_BASE_B = address;
SUBLCD_RS_HIGH;
- SUBLCD_BASE_W = data;
+ SUBLCD_BASE_W = data;
}
static void sublcd_write_GRAM(void)
SUBLCD_RESETB_HIGH;
udelay(5000);
-
+
/* change to I80 18bit mode */
SUBLCD_RS_LOW;
SUBLCD_BASE_B = 0x23;
/* set data bus width to 16bit for SROMC*/
__raw_writel(__raw_readl(SMC_BW) | 0x00000003, SMC_BW);
-
+
/* change to I80 16bit mode */
sublcd_write_register_16(0x03, 0x0030);
-
+
/* Power Setting Sequence */
sublcd_write_register_16(0x11, 0x000f);
sublcd_write_register_16(0x12, 0x0008);
read_image16(SUBLCD_BASE, 0, 0, 240, 320,
makepixel565((i * 12345678) & 255, (i * 50) & 255, (i * 87654321) & 255));
-
+
if (++i > 255) i = 0;
}
#include "s5p-fb.h"
#include "opening_wvga_32.h"
-#define PANEL_WIDTH 480
+#define PANEL_WIDTH 480
#define PANEL_HEIGHT 800
-#define S5P_LCD_BPP 32
+#define S5P_LCD_BPP 32
/* for DUAL LCD */
#define SCREEN_WIDTH (480 * 2)
{
unsigned long palette_size, palette_mem_size;
unsigned int fb_size;
-
+
fb_size = vid->vl_row * vid->vl_col * (vid->vl_bpix / 8);
lcd_base = lcdbase;
S5PC1XX_GPIO_DRV_OFFSET));
/* set gpio configuration pin for SUBLCD_RST(MP0_2[1]) and SUBLCD_ON(MP0_2[0] */
writel(readl(S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_2_OFFSET)) & 0xffffff00,
- S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_2_OFFSET));
+ S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_2_OFFSET));
writel(readl(S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_2_OFFSET)) | 0x00000011,
- S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_2_OFFSET));
+ S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_2_OFFSET));
/* set gpio confituration pin for SUB_DISPLAY_CS(MP0_1[2]) */
writel(readl(S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_1_OFFSET)) & 0xfffff0ff,
S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_1_OFFSET));
/* 3.5inch TL2796 LCD Panel */
//rgb_mode = MODE_RGB_P;
- cfg = readl(ctrl_base + S5P_VIDCON0);
+ cfg = readl(ctrl_base + S5P_VIDCON0);
cfg &= ~S5P_VIDCON0_VIDOUT_MASK;
/* clock source is HCLK */
cfg = 0;
cfg |= S5P_VIDTCON2_HOZVAL(pvid->vl_col - 1);
cfg |= S5P_VIDTCON2_LINEVAL(pvid->vl_row - 1);
-
+
writel(cfg, ctrl_base + S5P_VIDTCON2);
udebug("vidtcon2 = %x\n", cfg);
#define PANEL_WIDTH 480
#define PANEL_HEIGHT 800
-#define S5P_LCD_BPP 32
+#define S5P_LCD_BPP 32
extern void tl2796_panel_power_on(void);
extern void tl2796_panel_enable(void);
{
unsigned long palette_size, palette_mem_size;
unsigned int fb_size;
-
+
fb_size = vid->vl_row * vid->vl_col * (vid->vl_bpix / 8);
lcd_base = lcdbase;
/* set output to RGB */
rgb_mode = MODE_RGB_P;
- cfg = readl(ctrl_base + S5P_VIDCON0);
+ cfg = readl(ctrl_base + S5P_VIDCON0);
cfg &= ~S5P_VIDCON0_VIDOUT_MASK;
/* clock source is HCLK */
cfg = 0;
cfg |= S5P_VIDTCON2_HOZVAL(pvid->vl_col - 1);
cfg |= S5P_VIDTCON2_LINEVAL(pvid->vl_row - 1);
-
+
writel(cfg, ctrl_base + S5P_VIDTCON2);
udebug("vidtcon2 = %x\n", cfg);
S5PC1XX_GPIO_DAT_OFFSET))
#define S5PCFB_C100_CLK_HIGH writel(readl(S5PC100_GPIO_BASE(S5PC100_GPIO_K3_OFFSET+\
S5PC1XX_GPIO_DAT_OFFSET)) | 0x40, S5PC100_GPIO_BASE(S5PC100_GPIO_K3_OFFSET+\
- S5PC1XX_GPIO_DAT_OFFSET))
+ S5PC1XX_GPIO_DAT_OFFSET))
#define S5PCFB_C100_SDA_LOW writel(readl(S5PC100_GPIO_BASE(S5PC100_GPIO_K3_OFFSET+\
S5PC1XX_GPIO_DAT_OFFSET)) & 0x7f, S5PC100_GPIO_BASE(S5PC100_GPIO_K3_OFFSET+\
- S5PC1XX_GPIO_DAT_OFFSET))
+ S5PC1XX_GPIO_DAT_OFFSET))
#define S5PCFB_C100_SDA_HIGH writel(readl(S5PC100_GPIO_BASE(S5PC100_GPIO_K3_OFFSET+\
S5PC1XX_GPIO_DAT_OFFSET)) | 0x80, S5PC100_GPIO_BASE(S5PC100_GPIO_K3_OFFSET+\
S5PC1XX_GPIO_DAT_OFFSET))
static void tl2796_c100_spi_write_byte(unsigned char address, unsigned char command)
{
- int j;
+ int j;
unsigned char DELAY=1;
unsigned short data;
S5PCFB_C100_CLK_LOW;
/* data high or low */
- if ((data >> j) & 0x0001)
+ if ((data >> j) & 0x0001)
S5PCFB_C100_SDA_HIGH;
else
S5PCFB_C100_SDA_LOW;
-
+
udelay(DELAY);
S5PCFB_C100_CLK_HIGH;
static void tl2796_c110_spi_write_byte(unsigned char address, unsigned char command)
{
- int j;
+ int j;
unsigned char DELAY=1;
unsigned short data;
S5PCFB_C110_CLK_LOW;
/* data high or low */
- if ((data >> j) & 0x0001)
+ if ((data >> j) & 0x0001)
S5PCFB_C110_SDA_HIGH;
else
S5PCFB_C110_SDA_LOW;
-
+
udelay(DELAY);
S5PCFB_C110_CLK_HIGH;
writel(readl(S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_4_OFFSET+
S5PC1XX_GPIO_DAT_OFFSET)) | 0x02,
S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_4_OFFSET+
- S5PC1XX_GPIO_DAT_OFFSET));
+ S5PC1XX_GPIO_DAT_OFFSET));
/* set gpio pin for DISPLAY_SI to HIGH */
writel(readl(S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_4_OFFSET+
S5PC1XX_GPIO_DAT_OFFSET)) | 0x08,
S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_4_OFFSET+
- S5PC1XX_GPIO_DAT_OFFSET));
+ S5PC1XX_GPIO_DAT_OFFSET));
}
static void tl2796_spi_write_byte(unsigned char address, unsigned char command)
{
- int j;
+ int j;
unsigned char DELAY=1;
unsigned short data;
S5PCFB_CLK_HIGH;
udelay(DELAY);
- if (dual_lcd)
+ if (dual_lcd)
S5PCFB_SUB_CS_LOW;
S5PCFB_CS_LOW;
udelay(DELAY);
S5PCFB_CLK_LOW;
/* data high or low */
- if ((data >> j) & 0x0001)
+ if ((data >> j) & 0x0001)
S5PCFB_SDA_HIGH;
else
S5PCFB_SDA_LOW;
-
+
udelay(DELAY);
S5PCFB_CLK_HIGH;
writel(readl(S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_2_OFFSET+
S5PC1XX_GPIO_DAT_OFFSET)) | 0x02,
S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_2_OFFSET+
- S5PC1XX_GPIO_DAT_OFFSET));
+ S5PC1XX_GPIO_DAT_OFFSET));
/* set gpio data for SUBLCD_ON to HIGH */
writel(readl(S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_2_OFFSET+
S5PC1XX_GPIO_DAT_OFFSET)) | 0x01,
writel(readl(S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_2_OFFSET+
S5PC1XX_GPIO_DAT_OFFSET)) & 0xfd,
S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_2_OFFSET+
- S5PC1XX_GPIO_DAT_OFFSET));
+ S5PC1XX_GPIO_DAT_OFFSET));
udelay(20);
/* set gpio data for SUBLCD_RST to HIGH */
writel(readl(S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_2_OFFSET+
S5PC1XX_GPIO_DAT_OFFSET)) | 0x02,
S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_2_OFFSET+
- S5PC1XX_GPIO_DAT_OFFSET));
+ S5PC1XX_GPIO_DAT_OFFSET));
}
udelay(20000);
writel(readl(S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_4_OFFSET+
S5PC1XX_GPIO_DAT_OFFSET)) | 0x02,
S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_4_OFFSET+
- S5PC1XX_GPIO_DAT_OFFSET));
+ S5PC1XX_GPIO_DAT_OFFSET));
/* set gpio pin for DISPLAY_SI to HIGH */
writel(readl(S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_4_OFFSET+
S5PC1XX_GPIO_DAT_OFFSET)) | 0x08,
S5PC110_GPIO_BASE(S5PC110_GPIO_MP0_4_OFFSET+
- S5PC1XX_GPIO_DAT_OFFSET));
+ S5PC1XX_GPIO_DAT_OFFSET));
if (dual_lcd)
/* set gpio pin for SUB_DISPLAY_CS to HIGH */