#ifndef GCC_ARM_PROTOS_H
#define GCC_ARM_PROTOS_H
-extern void arm_override_options PARAMS ((void));
-extern int use_return_insn PARAMS ((int));
-extern int arm_regno_class PARAMS ((int));
-extern void arm_finalize_pic PARAMS ((int));
-extern int arm_volatile_func PARAMS ((void));
-extern const char * arm_output_epilogue PARAMS ((int));
-extern void arm_expand_prologue PARAMS ((void));
-extern HOST_WIDE_INT arm_get_frame_size PARAMS ((void));
-/* Used in arm.md, but defined in output.c. */
-extern void assemble_align PARAMS ((int));
-extern const char * arm_strip_name_encoding PARAMS ((const char *));
-extern void arm_asm_output_labelref PARAMS ((FILE *, const char *));
-extern unsigned long arm_current_func_type PARAMS ((void));
-extern unsigned int arm_compute_initial_elimination_offset PARAMS ((unsigned int, unsigned int));
+extern void arm_override_options (void);
+extern int use_return_insn (int);
+extern int arm_regno_class (int);
+extern void arm_finalize_pic (int);
+extern int arm_volatile_func (void);
+extern const char *arm_output_epilogue (int);
+extern void arm_expand_prologue (void);
+extern HOST_WIDE_INT arm_get_frame_size (void);
+extern const char *arm_strip_name_encoding (const char *);
+extern void arm_asm_output_labelref (FILE *, const char *);
+extern unsigned long arm_current_func_type (void);
+extern unsigned int arm_compute_initial_elimination_offset (unsigned int,
+ unsigned int);
#ifdef TREE_CODE
-extern int arm_return_in_memory PARAMS ((tree));
-extern void arm_encode_call_attribute PARAMS ((tree, int));
+extern int arm_return_in_memory (tree);
+extern void arm_encode_call_attribute (tree, int);
#endif
#ifdef RTX_CODE
-extern int arm_hard_regno_mode_ok PARAMS ((unsigned int,
- enum machine_mode));
-extern int const_ok_for_arm PARAMS ((HOST_WIDE_INT));
-extern int arm_split_constant PARAMS ((RTX_CODE, enum machine_mode,
- HOST_WIDE_INT, rtx, rtx, int));
-extern RTX_CODE arm_canonicalize_comparison PARAMS ((RTX_CODE, rtx *));
-extern int legitimate_pic_operand_p PARAMS ((rtx));
-extern rtx legitimize_pic_address PARAMS ((rtx, enum machine_mode, rtx));
-extern int arm_legitimate_address_p PARAMS ((enum machine_mode, rtx, int));
-extern int thumb_legitimate_address_p PARAMS ((enum machine_mode, rtx,
- int));
-extern int thumb_legitimate_offset_p PARAMS ((enum machine_mode,
- HOST_WIDE_INT));
-extern rtx arm_legitimize_address PARAMS ((rtx, rtx, enum machine_mode));
-extern int const_double_rtx_ok_for_fpa PARAMS ((rtx));
-extern int neg_const_double_rtx_ok_for_fpa PARAMS ((rtx));
+extern int arm_hard_regno_mode_ok (unsigned int, enum machine_mode);
+extern int const_ok_for_arm (HOST_WIDE_INT);
+extern int arm_split_constant (RTX_CODE, enum machine_mode, HOST_WIDE_INT, rtx,
+ rtx, int);
+extern RTX_CODE arm_canonicalize_comparison (RTX_CODE, rtx *);
+extern int legitimate_pic_operand_p (rtx);
+extern rtx legitimize_pic_address (rtx, enum machine_mode, rtx);
+extern int arm_legitimate_address_p (enum machine_mode, rtx, int);
+extern int thumb_legitimate_address_p (enum machine_mode, rtx, int);
+extern int thumb_legitimate_offset_p (enum machine_mode, HOST_WIDE_INT);
+extern rtx arm_legitimize_address (rtx, rtx, enum machine_mode);
+extern int const_double_rtx_ok_for_fpa (rtx);
+extern int neg_const_double_rtx_ok_for_fpa (rtx);
/* Predicates. */
-extern int s_register_operand PARAMS ((rtx, enum machine_mode));
-extern int arm_hard_register_operand PARAMS ((rtx, enum machine_mode));
-extern int f_register_operand PARAMS ((rtx, enum machine_mode));
-extern int reg_or_int_operand PARAMS ((rtx, enum machine_mode));
-extern int arm_reload_memory_operand PARAMS ((rtx, enum machine_mode));
-extern int arm_rhs_operand PARAMS ((rtx, enum machine_mode));
-extern int arm_rhsm_operand PARAMS ((rtx, enum machine_mode));
-extern int arm_add_operand PARAMS ((rtx, enum machine_mode));
-extern int arm_not_operand PARAMS ((rtx, enum machine_mode));
-extern int offsettable_memory_operand PARAMS ((rtx, enum machine_mode));
-extern int alignable_memory_operand PARAMS ((rtx, enum machine_mode));
-extern int bad_signed_byte_operand PARAMS ((rtx, enum machine_mode));
-extern int fpa_rhs_operand PARAMS ((rtx, enum machine_mode));
-extern int fpa_add_operand PARAMS ((rtx, enum machine_mode));
-extern int power_of_two_operand PARAMS ((rtx, enum machine_mode));
-extern int nonimmediate_di_operand PARAMS ((rtx, enum machine_mode));
-extern int di_operand PARAMS ((rtx, enum machine_mode));
-extern int nonimmediate_soft_df_operand PARAMS ((rtx, enum machine_mode));
-extern int soft_df_operand PARAMS ((rtx, enum machine_mode));
-extern int index_operand PARAMS ((rtx, enum machine_mode));
-extern int const_shift_operand PARAMS ((rtx, enum machine_mode));
-extern int arm_comparison_operator PARAMS ((rtx, enum machine_mode));
-extern int shiftable_operator PARAMS ((rtx, enum machine_mode));
-extern int shift_operator PARAMS ((rtx, enum machine_mode));
-extern int equality_operator PARAMS ((rtx, enum machine_mode));
-extern int minmax_operator PARAMS ((rtx, enum machine_mode));
-extern int cc_register PARAMS ((rtx, enum machine_mode));
-extern int dominant_cc_register PARAMS ((rtx, enum machine_mode));
-extern int logical_binary_operator PARAMS ((rtx, enum machine_mode));
-extern int multi_register_push PARAMS ((rtx, enum machine_mode));
-extern int load_multiple_operation PARAMS ((rtx, enum machine_mode));
-extern int store_multiple_operation PARAMS ((rtx, enum machine_mode));
-extern int cirrus_fp_register PARAMS ((rtx, enum machine_mode));
-extern int cirrus_general_operand PARAMS ((rtx, enum machine_mode));
-extern int cirrus_register_operand PARAMS ((rtx, enum machine_mode));
-extern int cirrus_shift_const PARAMS ((rtx, enum machine_mode));
-extern int cirrus_memory_offset PARAMS ((rtx));
-
-extern int symbol_mentioned_p PARAMS ((rtx));
-extern int label_mentioned_p PARAMS ((rtx));
-extern RTX_CODE minmax_code PARAMS ((rtx));
-extern int adjacent_mem_locations PARAMS ((rtx, rtx));
-extern int load_multiple_sequence PARAMS ((rtx *, int, int *, int *,
- HOST_WIDE_INT *));
-extern const char * emit_ldm_seq PARAMS ((rtx *, int));
-extern int store_multiple_sequence PARAMS ((rtx *, int, int *, int *,
- HOST_WIDE_INT *));
-extern const char * emit_stm_seq PARAMS ((rtx *, int));
-extern rtx arm_gen_load_multiple PARAMS ((int, int, rtx, int, int, int,
- int, int));
-extern rtx arm_gen_store_multiple PARAMS ((int, int, rtx, int, int, int,
- int, int));
-extern int arm_gen_movstrqi PARAMS ((rtx *));
-extern rtx arm_gen_rotated_half_load PARAMS ((rtx));
-extern enum machine_mode arm_select_cc_mode PARAMS ((RTX_CODE, rtx, rtx));
-extern enum machine_mode arm_select_dominance_cc_mode PARAMS ((rtx, rtx,
- HOST_WIDE_INT));
-extern rtx arm_gen_compare_reg PARAMS ((RTX_CODE, rtx, rtx));
-extern rtx arm_gen_return_addr_mask PARAMS ((void));
-extern void arm_reload_in_hi PARAMS ((rtx *));
-extern void arm_reload_out_hi PARAMS ((rtx *));
-extern const char * fp_immediate_constant PARAMS ((rtx));
-extern const char * output_call PARAMS ((rtx *));
-extern const char * output_call_mem PARAMS ((rtx *));
-extern const char * output_mov_long_double_fpa_from_arm PARAMS ((rtx *));
-extern const char * output_mov_long_double_arm_from_fpa PARAMS ((rtx *));
-extern const char * output_mov_long_double_arm_from_arm PARAMS ((rtx *));
-extern const char * output_mov_double_fpa_from_arm PARAMS ((rtx *));
-extern const char * output_mov_double_arm_from_fpa PARAMS ((rtx *));
-extern const char * output_move_double PARAMS ((rtx *));
-extern const char * output_mov_immediate PARAMS ((rtx *));
-extern const char * output_add_immediate PARAMS ((rtx *));
-extern const char * arithmetic_instr PARAMS ((rtx, int));
-extern void output_ascii_pseudo_op PARAMS ((FILE *, const unsigned char *,
- int));
-extern const char * output_return_instruction PARAMS ((rtx, int, int));
-extern void arm_poke_function_name PARAMS ((FILE *, const char *));
-extern void arm_print_operand PARAMS ((FILE *, rtx, int));
-extern void arm_print_operand_address PARAMS ((FILE *, rtx));
-extern void arm_final_prescan_insn PARAMS ((rtx));
-extern int arm_go_if_legitimate_address PARAMS ((enum machine_mode, rtx));
-extern int arm_debugger_arg_offset PARAMS ((int, rtx));
-extern int arm_is_longcall_p PARAMS ((rtx, int, int));
+extern int s_register_operand (rtx, enum machine_mode);
+extern int arm_hard_register_operand (rtx, enum machine_mode);
+extern int f_register_operand (rtx, enum machine_mode);
+extern int reg_or_int_operand (rtx, enum machine_mode);
+extern int arm_reload_memory_operand (rtx, enum machine_mode);
+extern int arm_rhs_operand (rtx, enum machine_mode);
+extern int arm_rhsm_operand (rtx, enum machine_mode);
+extern int arm_add_operand (rtx, enum machine_mode);
+extern int arm_not_operand (rtx, enum machine_mode);
+extern int offsettable_memory_operand (rtx, enum machine_mode);
+extern int alignable_memory_operand (rtx, enum machine_mode);
+extern int bad_signed_byte_operand (rtx, enum machine_mode);
+extern int fpa_rhs_operand (rtx, enum machine_mode);
+extern int fpa_add_operand (rtx, enum machine_mode);
+extern int power_of_two_operand (rtx, enum machine_mode);
+extern int nonimmediate_di_operand (rtx, enum machine_mode);
+extern int di_operand (rtx, enum machine_mode);
+extern int nonimmediate_soft_df_operand (rtx, enum machine_mode);
+extern int soft_df_operand (rtx, enum machine_mode);
+extern int index_operand (rtx, enum machine_mode);
+extern int const_shift_operand (rtx, enum machine_mode);
+extern int arm_comparison_operator (rtx, enum machine_mode);
+extern int shiftable_operator (rtx, enum machine_mode);
+extern int shift_operator (rtx, enum machine_mode);
+extern int equality_operator (rtx, enum machine_mode);
+extern int minmax_operator (rtx, enum machine_mode);
+extern int cc_register (rtx, enum machine_mode);
+extern int dominant_cc_register (rtx, enum machine_mode);
+extern int logical_binary_operator (rtx, enum machine_mode);
+extern int multi_register_push (rtx, enum machine_mode);
+extern int load_multiple_operation (rtx, enum machine_mode);
+extern int store_multiple_operation (rtx, enum machine_mode);
+extern int cirrus_fp_register (rtx, enum machine_mode);
+extern int cirrus_general_operand (rtx, enum machine_mode);
+extern int cirrus_register_operand (rtx, enum machine_mode);
+extern int cirrus_shift_const (rtx, enum machine_mode);
+extern int cirrus_memory_offset (rtx);
+
+extern int symbol_mentioned_p (rtx);
+extern int label_mentioned_p (rtx);
+extern RTX_CODE minmax_code (rtx);
+extern int adjacent_mem_locations (rtx, rtx);
+extern int load_multiple_sequence (rtx *, int, int *, int *, HOST_WIDE_INT *);
+extern const char *emit_ldm_seq (rtx *, int);
+extern int store_multiple_sequence (rtx *, int, int *, int *, HOST_WIDE_INT *);
+extern const char * emit_stm_seq (rtx *, int);
+extern rtx arm_gen_load_multiple (int, int, rtx, int, int, int, int, int);
+extern rtx arm_gen_store_multiple (int, int, rtx, int, int, int, int, int);
+extern int arm_gen_movstrqi (rtx *);
+extern rtx arm_gen_rotated_half_load (rtx);
+extern enum machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
+extern enum machine_mode arm_select_dominance_cc_mode (rtx, rtx,
+ HOST_WIDE_INT);
+extern rtx arm_gen_compare_reg (RTX_CODE, rtx, rtx);
+extern rtx arm_gen_return_addr_mask (void);
+extern void arm_reload_in_hi (rtx *);
+extern void arm_reload_out_hi (rtx *);
+extern const char *fp_immediate_constant (rtx);
+extern const char *output_call (rtx *);
+extern const char *output_call_mem (rtx *);
+extern const char *output_mov_long_double_fpa_from_arm (rtx *);
+extern const char *output_mov_long_double_arm_from_fpa (rtx *);
+extern const char *output_mov_long_double_arm_from_arm (rtx *);
+extern const char *output_mov_double_fpa_from_arm (rtx *);
+extern const char *output_mov_double_arm_from_fpa (rtx *);
+extern const char *output_move_double (rtx *);
+extern const char *output_mov_immediate (rtx *);
+extern const char *output_add_immediate (rtx *);
+extern const char *arithmetic_instr (rtx, int);
+extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int);
+extern const char *output_return_instruction (rtx, int, int);
+extern void arm_poke_function_name (FILE *, const char *);
+extern void arm_print_operand (FILE *, rtx, int);
+extern void arm_print_operand_address (FILE *, rtx);
+extern void arm_final_prescan_insn (rtx);
+extern int arm_go_if_legitimate_address (enum machine_mode, rtx);
+extern int arm_debugger_arg_offset (int, rtx);
+extern int arm_is_longcall_p (rtx, int, int);
#if defined TREE_CODE
-extern rtx arm_function_arg PARAMS ((CUMULATIVE_ARGS *,
- enum machine_mode, tree, int));
-extern void arm_init_cumulative_args PARAMS ((CUMULATIVE_ARGS *, tree, rtx,
- tree));
-extern rtx arm_va_arg PARAMS ((tree, tree));
-extern int arm_function_arg_pass_by_reference PARAMS ((CUMULATIVE_ARGS *,
- enum machine_mode,
- tree, int));
+extern rtx arm_function_arg (CUMULATIVE_ARGS *, enum machine_mode, tree, int);
+extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree);
+extern rtx arm_va_arg (tree, tree);
+extern int arm_function_arg_pass_by_reference (CUMULATIVE_ARGS *,
+ enum machine_mode, tree, int);
#endif
#if defined AOF_ASSEMBLER
-extern rtx aof_pic_entry PARAMS ((rtx));
-extern char * aof_text_section PARAMS ((void));
-extern char * aof_data_section PARAMS ((void));
-extern void aof_add_import PARAMS ((const char *));
-extern void aof_delete_import PARAMS ((const char *));
-extern void zero_init_section PARAMS ((void));
-extern void common_section PARAMS ((void));
+extern rtx aof_pic_entry (rtx);
+extern char *aof_text_section (void);
+extern char *aof_data_section (void);
+extern void aof_add_import (const char *);
+extern void aof_delete_import (const char *);
+extern void zero_init_section (void);
+extern void common_section (void);
#endif /* AOF_ASSEMBLER */
#endif /* RTX_CODE */
-extern int arm_float_words_big_endian PARAMS ((void));
+extern int arm_float_words_big_endian (void);
/* Thumb functions. */
-extern void arm_init_expanders PARAMS ((void));
-extern int thumb_far_jump_used_p PARAMS ((int));
-extern const char * thumb_unexpanded_epilogue PARAMS ((void));
-extern HOST_WIDE_INT thumb_get_frame_size PARAMS ((void));
-extern void thumb_expand_prologue PARAMS ((void));
-extern void thumb_expand_epilogue PARAMS ((void));
+extern void arm_init_expanders (void);
+extern int thumb_far_jump_used_p (int);
+extern const char *thumb_unexpanded_epilogue (void);
+extern HOST_WIDE_INT thumb_get_frame_size (void);
+extern void thumb_expand_prologue (void);
+extern void thumb_expand_epilogue (void);
#ifdef TREE_CODE
-extern int is_called_in_ARM_mode PARAMS ((tree));
+extern int is_called_in_ARM_mode (tree);
#endif
-extern int thumb_shiftable_const PARAMS ((unsigned HOST_WIDE_INT));
+extern int thumb_shiftable_const (unsigned HOST_WIDE_INT);
#ifdef RTX_CODE
-extern void thumb_final_prescan_insn PARAMS ((rtx));
-extern const char * thumb_load_double_from_address
- PARAMS ((rtx *));
-extern const char * thumb_output_move_mem_multiple
- PARAMS ((int, rtx *));
-extern void thumb_expand_movstrqi PARAMS ((rtx *));
-extern int thumb_cmp_operand PARAMS ((rtx, enum machine_mode));
-extern rtx * thumb_legitimize_pic_address
- PARAMS ((rtx, enum machine_mode, rtx));
-extern int thumb_go_if_legitimate_address
- PARAMS ((enum machine_mode, rtx));
-extern rtx arm_return_addr PARAMS ((int, rtx));
-extern void thumb_reload_out_hi PARAMS ((rtx *));
-extern void thumb_reload_in_hi PARAMS ((rtx *));
+extern void thumb_final_prescan_insn (rtx);
+extern const char *thumb_load_double_from_address (rtx *);
+extern const char *thumb_output_move_mem_multiple (int, rtx *);
+extern void thumb_expand_movstrqi (rtx *);
+extern int thumb_cmp_operand (rtx, enum machine_mode);
+extern rtx *thumb_legitimize_pic_address (rtx, enum machine_mode, rtx);
+extern int thumb_go_if_legitimate_address (enum machine_mode, rtx);
+extern rtx arm_return_addr (int, rtx);
+extern void thumb_reload_out_hi (rtx *);
+extern void thumb_reload_in_hi (rtx *);
#endif
/* Defined in pe.c. */
-extern int arm_dllexport_name_p PARAMS ((const char *));
-extern int arm_dllimport_name_p PARAMS ((const char *));
+extern int arm_dllexport_name_p (const char *);
+extern int arm_dllimport_name_p (const char *);
#ifdef TREE_CODE
-extern void arm_pe_unique_section PARAMS ((tree, int));
-extern void arm_pe_encode_section_info PARAMS ((tree, rtx, int));
-extern int arm_dllexport_p PARAMS ((tree));
-extern int arm_dllimport_p PARAMS ((tree));
-extern void arm_mark_dllexport PARAMS ((tree));
-extern void arm_mark_dllimport PARAMS ((tree));
+extern void arm_pe_unique_section (tree, int);
+extern void arm_pe_encode_section_info (tree, rtx, int);
+extern int arm_dllexport_p (tree);
+extern int arm_dllimport_p (tree);
+extern void arm_mark_dllexport (tree);
+extern void arm_mark_dllimport (tree);
#endif
-extern void arm_pr_long_calls PARAMS ((struct cpp_reader *));
-extern void arm_pr_no_long_calls PARAMS ((struct cpp_reader *));
-extern void arm_pr_long_calls_off PARAMS ((struct cpp_reader *));
+extern void arm_pr_long_calls (struct cpp_reader *);
+extern void arm_pr_no_long_calls (struct cpp_reader *);
+extern void arm_pr_long_calls_off (struct cpp_reader *);
#endif /* ! GCC_ARM_PROTOS_H */
typedef struct minipool_node Mnode;
typedef struct minipool_fixup Mfix;
-/* In order to improve the layout of the prototypes below
- some short type abbreviations are defined here. */
-#define Hint HOST_WIDE_INT
-#define Mmode enum machine_mode
-#define Ulong unsigned long
-#define Ccstar const char *
-
const char extra_reg_names1[][16] =
{ "mv0", "mv1", "mv2", "mv3", "mv4", "mv5", "mv6", "mv7",
"mv8", "mv9", "mv10", "mv11", "mv12", "mv13", "mv14", "mv15"
const struct attribute_spec arm_attribute_table[];
/* Forward function declarations. */
-static void arm_add_gc_roots PARAMS ((void));
-static int arm_gen_constant PARAMS ((enum rtx_code, Mmode, Hint, rtx, rtx, int, int));
-static unsigned bit_count PARAMS ((Ulong));
-static int arm_address_register_rtx_p PARAMS ((rtx, int));
-static int arm_legitimate_index_p PARAMS ((Mmode, rtx, int));
-static int thumb_base_register_rtx_p PARAMS ((rtx, Mmode, int));
-inline static int thumb_index_register_rtx_p PARAMS ((rtx, int));
-static int const_ok_for_op PARAMS ((Hint, enum rtx_code));
-static int eliminate_lr2ip PARAMS ((rtx *));
-static rtx emit_multi_reg_push PARAMS ((int));
-static rtx emit_sfm PARAMS ((int, int));
+static void arm_add_gc_roots (void);
+static int arm_gen_constant (enum rtx_code, enum machine_mode, HOST_WIDE_INT,
+ rtx, rtx, int, int);
+static unsigned bit_count (unsigned long);
+static int arm_address_register_rtx_p (rtx, int);
+static int arm_legitimate_index_p (enum machine_mode, rtx, int);
+static int thumb_base_register_rtx_p (rtx, enum machine_mode, int);
+inline static int thumb_index_register_rtx_p (rtx, int);
+static int const_ok_for_op (HOST_WIDE_INT, enum rtx_code);
+static int eliminate_lr2ip (rtx *);
+static rtx emit_multi_reg_push (int);
+static rtx emit_sfm (int, int);
#ifndef AOF_ASSEMBLER
-static bool arm_assemble_integer PARAMS ((rtx, unsigned int, int));
+static bool arm_assemble_integer (rtx, unsigned int, int);
#endif
-static Ccstar fp_const_from_val PARAMS ((REAL_VALUE_TYPE *));
-static arm_cc get_arm_condition_code PARAMS ((rtx));
-static void init_fpa_table PARAMS ((void));
-static Hint int_log2 PARAMS ((Hint));
-static rtx is_jump_table PARAMS ((rtx));
-static Ccstar output_multi_immediate PARAMS ((rtx *, Ccstar, Ccstar, int, Hint));
-static void print_multi_reg PARAMS ((FILE *, Ccstar, int, int));
-static Ccstar shift_op PARAMS ((rtx, Hint *));
-static struct machine_function * arm_init_machine_status PARAMS ((void));
-static int number_of_first_bit_set PARAMS ((int));
-static void replace_symbols_in_block PARAMS ((tree, rtx, rtx));
-static void thumb_exit PARAMS ((FILE *, int, rtx));
-static void thumb_pushpop PARAMS ((FILE *, int, int));
-static Ccstar thumb_condition_code PARAMS ((rtx, int));
-static rtx is_jump_table PARAMS ((rtx));
-static Hint get_jump_table_size PARAMS ((rtx));
-static Mnode * move_minipool_fix_forward_ref PARAMS ((Mnode *, Mnode *, Hint));
-static Mnode * add_minipool_forward_ref PARAMS ((Mfix *));
-static Mnode * move_minipool_fix_backward_ref PARAMS ((Mnode *, Mnode *, Hint));
-static Mnode * add_minipool_backward_ref PARAMS ((Mfix *));
-static void assign_minipool_offsets PARAMS ((Mfix *));
-static void arm_print_value PARAMS ((FILE *, rtx));
-static void dump_minipool PARAMS ((rtx));
-static int arm_barrier_cost PARAMS ((rtx));
-static Mfix * create_fix_barrier PARAMS ((Mfix *, Hint));
-static void push_minipool_barrier PARAMS ((rtx, Hint));
-static void push_minipool_fix PARAMS ((rtx, Hint, rtx *, Mmode, rtx));
-static void arm_reorg PARAMS ((void));
-static bool note_invalid_constants PARAMS ((rtx, Hint, int));
-static int current_file_function_operand PARAMS ((rtx));
-static Ulong arm_compute_save_reg0_reg12_mask PARAMS ((void));
-static Ulong arm_compute_save_reg_mask PARAMS ((void));
-static Ulong arm_isr_value PARAMS ((tree));
-static Ulong arm_compute_func_type PARAMS ((void));
-static tree arm_handle_fndecl_attribute PARAMS ((tree *, tree, tree, int, bool *));
-static tree arm_handle_isr_attribute PARAMS ((tree *, tree, tree, int, bool *));
-static void arm_output_function_epilogue PARAMS ((FILE *, Hint));
-static void arm_output_function_prologue PARAMS ((FILE *, Hint));
-static void thumb_output_function_prologue PARAMS ((FILE *, Hint));
-static int arm_comp_type_attributes PARAMS ((tree, tree));
-static void arm_set_default_type_attributes PARAMS ((tree));
-static int arm_adjust_cost PARAMS ((rtx, rtx, rtx, int));
-static int arm_use_dfa_pipeline_interface PARAMS ((void));
-static int count_insns_for_constant PARAMS ((Hint, int));
-static int arm_get_strip_length PARAMS ((int));
-static bool arm_function_ok_for_sibcall PARAMS ((tree, tree));
-static void arm_internal_label PARAMS ((FILE *, Ccstar, Ulong));
-static void arm_output_mi_thunk PARAMS ((FILE *, tree, Hint, Hint, tree));
-static int arm_rtx_costs_1 PARAMS ((rtx, enum rtx_code, enum rtx_code));
-static bool arm_rtx_costs PARAMS ((rtx, int, int, int *));
-static int arm_address_cost PARAMS ((rtx));
-static bool arm_memory_load_p PARAMS ((rtx));
-static bool arm_cirrus_insn_p PARAMS ((rtx));
-static void cirrus_reorg PARAMS ((rtx));
+static const char *fp_const_from_val (REAL_VALUE_TYPE *);
+static arm_cc get_arm_condition_code (rtx);
+static void init_fpa_table (void);
+static HOST_WIDE_INT int_log2 (HOST_WIDE_INT);
+static rtx is_jump_table (rtx);
+static const char *output_multi_immediate (rtx *, const char *, const char *,
+ int, HOST_WIDE_INT);
+static void print_multi_reg (FILE *, const char *, int, int);
+static const char *shift_op (rtx, HOST_WIDE_INT *);
+static struct machine_function *arm_init_machine_status (void);
+static int number_of_first_bit_set (int);
+static void replace_symbols_in_block (tree, rtx, rtx);
+static void thumb_exit (FILE *, int, rtx);
+static void thumb_pushpop (FILE *, int, int);
+static const char *thumb_condition_code (rtx, int);
+static rtx is_jump_table (rtx);
+static HOST_WIDE_INT get_jump_table_size (rtx);
+static Mnode *move_minipool_fix_forward_ref (Mnode *, Mnode *, HOST_WIDE_INT);
+static Mnode *add_minipool_forward_ref (Mfix *);
+static Mnode *move_minipool_fix_backward_ref (Mnode *, Mnode *, HOST_WIDE_INT);
+static Mnode *add_minipool_backward_ref (Mfix *);
+static void assign_minipool_offsets (Mfix *);
+static void arm_print_value (FILE *, rtx);
+static void dump_minipool (rtx);
+static int arm_barrier_cost (rtx);
+static Mfix *create_fix_barrier (Mfix *, HOST_WIDE_INT);
+static void push_minipool_barrier (rtx, HOST_WIDE_INT);
+static void push_minipool_fix (rtx, HOST_WIDE_INT, rtx *, enum machine_mode,
+ rtx);
+static void arm_reorg (void);
+static bool note_invalid_constants (rtx, HOST_WIDE_INT, int);
+static int current_file_function_operand (rtx);
+static unsigned long arm_compute_save_reg0_reg12_mask (void);
+static unsigned long arm_compute_save_reg_mask (void);
+static unsigned long arm_isr_value (tree);
+static unsigned long arm_compute_func_type (void);
+static tree arm_handle_fndecl_attribute (tree *, tree, tree, int, bool *);
+static tree arm_handle_isr_attribute (tree *, tree, tree, int, bool *);
+static void arm_output_function_epilogue (FILE *, HOST_WIDE_INT);
+static void arm_output_function_prologue (FILE *, HOST_WIDE_INT);
+static void thumb_output_function_prologue (FILE *, HOST_WIDE_INT);
+static int arm_comp_type_attributes (tree, tree);
+static void arm_set_default_type_attributes (tree);
+static int arm_adjust_cost (rtx, rtx, rtx, int);
+static int arm_use_dfa_pipeline_interface (void);
+static int count_insns_for_constant (HOST_WIDE_INT, int);
+static int arm_get_strip_length (int);
+static bool arm_function_ok_for_sibcall (tree, tree);
+static void arm_internal_label (FILE *, const char *, unsigned long);
+static void arm_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT,
+ tree);
+static int arm_rtx_costs_1 (rtx, enum rtx_code, enum rtx_code);
+static bool arm_rtx_costs (rtx, int, int, int *);
+static int arm_address_cost (rtx);
+static bool arm_memory_load_p (rtx);
+static bool arm_cirrus_insn_p (rtx);
+static void cirrus_reorg (rtx);
#ifdef OBJECT_FORMAT_ELF
-static void arm_elf_asm_named_section PARAMS ((Ccstar, unsigned int));
+static void arm_elf_asm_named_section (const char *, unsigned int);
#endif
#ifndef ARM_PE
-static void arm_encode_section_info PARAMS ((tree, rtx, int));
+static void arm_encode_section_info (tree, rtx, int);
#endif
#ifdef AOF_ASSEMBLER
-static void aof_globalize_label PARAMS ((FILE *, Ccstar));
-static void aof_dump_imports PARAMS ((FILE *));
-static void aof_dump_pic_table PARAMS ((FILE *));
-static void aof_file_end PARAMS ((void));
+static void aof_globalize_label (FILE *, const char *);
+static void aof_dump_imports (FILE *);
+static void aof_dump_pic_table (FILE *);
+static void aof_file_end (void);
#endif
-#undef Hint
-#undef Mmode
-#undef Ulong
-#undef Ccstar
\f
/* Initialize the GCC target structure. */
#ifdef TARGET_DLLIMPORT_DECL_ATTRIBUTES
/* Return the number of bits set in VALUE. */
static unsigned
-bit_count (value)
- unsigned long value;
+bit_count (unsigned long value)
{
unsigned long count = 0;
/* Fix up any incompatible options that the user has specified.
This has now turned into a maze. */
void
-arm_override_options ()
+arm_override_options (void)
{
unsigned i;
}
static void
-arm_add_gc_roots ()
+arm_add_gc_roots (void)
{
gcc_obstack_init(&minipool_obstack);
minipool_startobj = (char *) obstack_alloc (&minipool_obstack, 0);
function, or ARM_FT_UNKNOWN if the type cannot be determined. */
static unsigned long
-arm_isr_value (argument)
- tree argument;
+arm_isr_value (tree argument)
{
const isr_attribute_arg * ptr;
const char * arg;
/* Computes the type of the current function. */
static unsigned long
-arm_compute_func_type ()
+arm_compute_func_type (void)
{
unsigned long type = ARM_FT_UNKNOWN;
tree a;
/* Returns the type of the current function. */
unsigned long
-arm_current_func_type ()
+arm_current_func_type (void)
{
if (ARM_FUNC_TYPE (cfun->machine->func_type) == ARM_FT_UNKNOWN)
cfun->machine->func_type = arm_compute_func_type ();
/* Return 1 if it is possible to return using a single instruction. */
int
-use_return_insn (iscond)
- int iscond;
+use_return_insn (int iscond)
{
int regno;
unsigned int func_type;
/* Return TRUE if int I is a valid immediate ARM constant. */
int
-const_ok_for_arm (i)
- HOST_WIDE_INT i;
+const_ok_for_arm (HOST_WIDE_INT i)
{
unsigned HOST_WIDE_INT mask = ~(unsigned HOST_WIDE_INT)0xFF;
/* Return true if I is a valid constant for the operation CODE. */
static int
-const_ok_for_op (i, code)
- HOST_WIDE_INT i;
- enum rtx_code code;
+const_ok_for_op (HOST_WIDE_INT i, enum rtx_code code)
{
if (const_ok_for_arm (i))
return 1;
Return value is the number of insns emitted. */
int
-arm_split_constant (code, mode, val, target, source, subtargets)
- enum rtx_code code;
- enum machine_mode mode;
- HOST_WIDE_INT val;
- rtx target;
- rtx source;
- int subtargets;
+arm_split_constant (enum rtx_code code, enum machine_mode mode,
+ HOST_WIDE_INT val, rtx target, rtx source, int subtargets)
{
if (subtargets || code == SET
|| (GET_CODE (target) == REG && GET_CODE (source) == REG
}
static int
-count_insns_for_constant (remainder, i)
- HOST_WIDE_INT remainder;
- int i;
+count_insns_for_constant (HOST_WIDE_INT remainder, int i)
{
HOST_WIDE_INT temp1;
int num_insns = 0;
RTL generation. */
static int
-arm_gen_constant (code, mode, val, target, source, subtargets, generate)
- enum rtx_code code;
- enum machine_mode mode;
- HOST_WIDE_INT val;
- rtx target;
- rtx source;
- int subtargets;
- int generate;
+arm_gen_constant (enum rtx_code code, enum machine_mode mode,
+ HOST_WIDE_INT val, rtx target, rtx source, int subtargets,
+ int generate)
{
int can_invert = 0;
int can_negate = 0;
immediate value easier to load. */
enum rtx_code
-arm_canonicalize_comparison (code, op1)
- enum rtx_code code;
- rtx * op1;
+arm_canonicalize_comparison (enum rtx_code code, rtx * op1)
{
unsigned HOST_WIDE_INT i = INTVAL (*op1);
/* Decide whether a type should be returned in memory (true)
or in a register (false). This is called by the macro
RETURN_IN_MEMORY. */
-
int
-arm_return_in_memory (type)
- tree type;
+arm_return_in_memory (tree type)
{
HOST_WIDE_INT size;
/* Indicate whether or not words of a double are in big-endian order. */
int
-arm_float_words_big_endian ()
+arm_float_words_big_endian (void)
{
if (TARGET_CIRRUS)
return 0;
for a call to a function whose data type is FNTYPE.
For a library call, FNTYPE is NULL. */
void
-arm_init_cumulative_args (pcum, fntype, libname, fndecl)
- CUMULATIVE_ARGS * pcum;
- tree fntype;
- rtx libname ATTRIBUTE_UNUSED;
- tree fndecl ATTRIBUTE_UNUSED;
+arm_init_cumulative_args (CUMULATIVE_ARGS *pcum, tree fntype,
+ rtx libname ATTRIBUTE_UNUSED,
+ tree fndecl ATTRIBUTE_UNUSED)
{
/* On the ARM, the offset starts at 0. */
pcum->nregs = ((fntype && aggregate_value_p (TREE_TYPE (fntype))) ? 1 : 0);
(otherwise it is an extra parameter matching an ellipsis). */
rtx
-arm_function_arg (pcum, mode, type, named)
- CUMULATIVE_ARGS * pcum;
- enum machine_mode mode;
- tree type ATTRIBUTE_UNUSED;
- int named;
+arm_function_arg (CUMULATIVE_ARGS *pcum, enum machine_mode mode,
+ tree type ATTRIBUTE_UNUSED, int named)
{
if (mode == VOIDmode)
/* Compute operand 2 of the call insn. */
extension to the ARM ABI. */
int
-arm_function_arg_pass_by_reference (cum, mode, type, named)
- CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED;
- enum machine_mode mode ATTRIBUTE_UNUSED;
- tree type;
- int named ATTRIBUTE_UNUSED;
+arm_function_arg_pass_by_reference (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED,
+ enum machine_mode mode ATTRIBUTE_UNUSED,
+ tree type, int named ATTRIBUTE_UNUSED)
{
return type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST;
}
/* Implement va_arg. */
rtx
-arm_va_arg (valist, type)
- tree valist, type;
+arm_va_arg (tree valist, tree type)
{
/* Variable sized types are passed by reference. */
if (TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST)
static arm_pragma_enum arm_pragma_long_calls = OFF;
void
-arm_pr_long_calls (pfile)
- struct cpp_reader * pfile ATTRIBUTE_UNUSED;
+arm_pr_long_calls (struct cpp_reader * pfile ATTRIBUTE_UNUSED)
{
arm_pragma_long_calls = LONG;
}
void
-arm_pr_no_long_calls (pfile)
- struct cpp_reader * pfile ATTRIBUTE_UNUSED;
+arm_pr_no_long_calls (struct cpp_reader * pfile ATTRIBUTE_UNUSED)
{
arm_pragma_long_calls = SHORT;
}
void
-arm_pr_long_calls_off (pfile)
- struct cpp_reader * pfile ATTRIBUTE_UNUSED;
+arm_pr_long_calls_off (struct cpp_reader * pfile ATTRIBUTE_UNUSED)
{
arm_pragma_long_calls = OFF;
}
/* Handle an attribute requiring a FUNCTION_DECL;
arguments as in struct attribute_spec.handler. */
-
static tree
-arm_handle_fndecl_attribute (node, name, args, flags, no_add_attrs)
- tree * node;
- tree name;
- tree args ATTRIBUTE_UNUSED;
- int flags ATTRIBUTE_UNUSED;
- bool * no_add_attrs;
+arm_handle_fndecl_attribute (tree *node, tree name, tree args ATTRIBUTE_UNUSED,
+ int flags ATTRIBUTE_UNUSED, bool *no_add_attrs)
{
if (TREE_CODE (*node) != FUNCTION_DECL)
{
/* Handle an "interrupt" or "isr" attribute;
arguments as in struct attribute_spec.handler. */
-
static tree
-arm_handle_isr_attribute (node, name, args, flags, no_add_attrs)
- tree * node;
- tree name;
- tree args;
- int flags;
- bool * no_add_attrs;
+arm_handle_isr_attribute (tree *node, tree name, tree args, int flags,
+ bool *no_add_attrs)
{
if (DECL_P (*node))
{
/* Return 0 if the attributes for two types are incompatible, 1 if they
are compatible, and 2 if they are nearly compatible (which causes a
warning to be generated). */
-
static int
-arm_comp_type_attributes (type1, type2)
- tree type1;
- tree type2;
+arm_comp_type_attributes (tree type1, tree type2)
{
int l1, l2, s1, s2;
/* Encode long_call or short_call attribute by prefixing
symbol name in DECL with a special character FLAG. */
-
void
-arm_encode_call_attribute (decl, flag)
- tree decl;
- int flag;
+arm_encode_call_attribute (tree decl, int flag)
{
const char * str = XSTR (XEXP (DECL_RTL (decl), 0), 0);
int len = strlen (str);
/* Assigns default attributes to newly defined type. This is used to
set short_call/long_call attributes for function types of
functions defined inside corresponding #pragma scopes. */
-
static void
-arm_set_default_type_attributes (type)
- tree type;
+arm_set_default_type_attributes (tree type)
{
/* Add __attribute__ ((long_call)) to all functions, when
inside #pragma long_calls or __attribute__ ((short_call)),
/* Return 1 if the operand is a SYMBOL_REF for a function known to be
defined within the current compilation unit. If this cannot be
determined, then 0 is returned. */
-
static int
-current_file_function_operand (sym_ref)
- rtx sym_ref;
+current_file_function_operand (rtx sym_ref)
{
/* This is a bit of a fib. A function will have a short call flag
applied to its name if it has the short call attribute, or it has
"call_symbol" and "call_symbol_value" patterns and to 0 in the "call"
and "call_value" patterns. This is because of the difference in the
SYM_REFs passed by these patterns. */
-
int
-arm_is_longcall_p (sym_ref, call_cookie, call_symbol)
- rtx sym_ref;
- int call_cookie;
- int call_symbol;
+arm_is_longcall_p (rtx sym_ref, int call_cookie, int call_symbol)
{
if (!call_symbol)
{
}
/* Return nonzero if it is ok to make a tail-call to DECL. */
-
static bool
-arm_function_ok_for_sibcall (decl, exp)
- tree decl;
- tree exp ATTRIBUTE_UNUSED;
+arm_function_ok_for_sibcall (tree decl, tree exp ATTRIBUTE_UNUSED)
{
int call_type = TARGET_LONG_CALLS ? CALL_LONG : CALL_NORMAL;
/* Return non-zero if X is a legitimate immediate operand when compiling
for PIC. */
int
-legitimate_pic_operand_p (x)
- rtx x;
+legitimate_pic_operand_p (rtx x)
{
if (CONSTANT_P (x)
&& flag_pic
}
rtx
-legitimize_pic_address (orig, mode, reg)
- rtx orig;
- enum machine_mode mode;
- rtx reg;
+legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg)
{
if (GET_CODE (orig) == SYMBOL_REF
|| GET_CODE (orig) == LABEL_REF)
generated insns at the start of the function); false if called
by an exception receiver that needs the PIC register reloaded
(in which case the insns are just dumped at the current location). */
-
void
-arm_finalize_pic (prologue)
- int prologue ATTRIBUTE_UNUSED;
+arm_finalize_pic (int prologue ATTRIBUTE_UNUSED)
{
#ifndef AOF_ASSEMBLER
rtx l1, pic_tmp, pic_tmp2, seq, pic_rtx;
/* Return nonzero if X is valid as an ARM state addressing register. */
static int
-arm_address_register_rtx_p (x, strict_p)
- rtx x;
- int strict_p;
+arm_address_register_rtx_p (rtx x, int strict_p)
{
int regno;
/* Return nonzero if X is a valid ARM state address operand. */
int
-arm_legitimate_address_p (mode, x, strict_p)
- enum machine_mode mode;
- rtx x;
- int strict_p;
+arm_legitimate_address_p (enum machine_mode mode, rtx x, int strict_p)
{
if (arm_address_register_rtx_p (x, strict_p))
return 1;
/* Return nonzero if INDEX is valid for an address index operand in
ARM state. */
static int
-arm_legitimate_index_p (mode, index, strict_p)
- enum machine_mode mode;
- rtx index;
- int strict_p;
+arm_legitimate_index_p (enum machine_mode mode, rtx index, int strict_p)
{
HOST_WIDE_INT range;
enum rtx_code code = GET_CODE (index);
/* Return nonzero if X is valid as an ARM state addressing register. */
static int
-thumb_base_register_rtx_p (x, mode, strict_p)
- rtx x;
- enum machine_mode mode;
- int strict_p;
+thumb_base_register_rtx_p (rtx x, enum machine_mode mode, int strict_p)
{
int regno;
/* Return nonzero if x is a legitimate index register. This is the case
for any base register that can access a QImode object. */
inline static int
-thumb_index_register_rtx_p (x, strict_p)
- rtx x;
- int strict_p;
+thumb_index_register_rtx_p (rtx x, int strict_p)
{
return thumb_base_register_rtx_p (x, QImode, strict_p);
}
reload pass starts. This is so that eliminating such addresses
into stack based ones won't produce impossible code. */
int
-thumb_legitimate_address_p (mode, x, strict_p)
- enum machine_mode mode;
- rtx x;
- int strict_p;
+thumb_legitimate_address_p (enum machine_mode mode, rtx x, int strict_p)
{
/* ??? Not clear if this is right. Experiment. */
if (GET_MODE_SIZE (mode) < 4
/* Return nonzero if VAL can be used as an offset in a Thumb-state address
instruction of mode MODE. */
int
-thumb_legitimate_offset_p (mode, val)
- enum machine_mode mode;
- HOST_WIDE_INT val;
+thumb_legitimate_offset_p (enum machine_mode mode, HOST_WIDE_INT val)
{
switch (GET_MODE_SIZE (mode))
{
/* Try machine-dependent ways of modifying an illegitimate address
to be legitimate. If we find one, return the new, valid address. */
-
rtx
-arm_legitimize_address (x, orig_x, mode)
- rtx x;
- rtx orig_x;
- enum machine_mode mode;
+arm_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode)
{
if (GET_CODE (x) == PLUS)
{
#ifndef COSTS_N_INSNS
#define COSTS_N_INSNS(N) ((N) * 4 - 2)
#endif
-
+/* Worker routine for arm_rtx_costs. */
static inline int
-arm_rtx_costs_1 (x, code, outer)
- rtx x;
- enum rtx_code code;
- enum rtx_code outer;
+arm_rtx_costs_1 (rtx x, enum rtx_code code, enum rtx_code outer)
{
enum machine_mode mode = GET_MODE (x);
enum rtx_code subcode;
}
static bool
-arm_rtx_costs (x, code, outer_code, total)
- rtx x;
- int code, outer_code;
- int *total;
+arm_rtx_costs (rtx x, int code, int outer_code, int *total)
{
*total = arm_rtx_costs_1 (x, code, outer_code);
return true;
the same for practically all of them. So we weight the different types
of address here in the order (most pref first):
PRE/POST_INC/DEC, SHIFT or NON-INT sum, INT sum, REG, MEM or LABEL. */
-
static int
-arm_address_cost (X)
- rtx X;
+arm_address_cost (rtx x)
{
#define ARM_ADDRESS_COST(X) \
(10 - ((GET_CODE (X) == MEM || GET_CODE (X) == LABEL_REF \
&& GET_CODE (XEXP (X, 1)) == CONST_INT)) \
? 1 : 2)
- return (TARGET_ARM ? ARM_ADDRESS_COST (X) : THUMB_ADDRESS_COST (X));
+ return (TARGET_ARM ? ARM_ADDRESS_COST (x) : THUMB_ADDRESS_COST (x));
}
static int
-arm_use_dfa_pipeline_interface ()
+arm_use_dfa_pipeline_interface (void)
{
return true;
}
static int
-arm_adjust_cost (insn, link, dep, cost)
- rtx insn;
- rtx link;
- rtx dep;
- int cost;
+arm_adjust_cost (rtx insn, rtx link, rtx dep, int cost)
{
rtx i_pat, d_pat;
return cost;
}
-/* This code has been fixed for cross compilation. */
-
static int fpa_consts_inited = 0;
static const char * const strings_fpa[8] =
static REAL_VALUE_TYPE values_fpa[8];
static void
-init_fpa_table ()
+init_fpa_table (void)
{
int i;
REAL_VALUE_TYPE r;
}
/* Return TRUE if rtx X is a valid immediate FPA constant. */
-
int
-const_double_rtx_ok_for_fpa (x)
- rtx x;
+const_double_rtx_ok_for_fpa (rtx x)
{
REAL_VALUE_TYPE r;
int i;
}
/* Return TRUE if rtx X is a valid immediate FPA constant. */
-
int
-neg_const_double_rtx_ok_for_fpa (x)
- rtx x;
+neg_const_double_rtx_ok_for_fpa (rtx x)
{
REAL_VALUE_TYPE r;
int i;
code. SUBREG(MEM) always needs a reload in the places where
s_register_operand is used, and this seemed to lead to excessive
reloading. */
-
int
-s_register_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+s_register_operand (rtx op, enum machine_mode mode)
{
if (GET_MODE (op) != mode && mode != VOIDmode)
return 0;
}
/* A hard register operand (even before reload. */
-
int
-arm_hard_register_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+arm_hard_register_operand (rtx op, enum machine_mode mode)
{
if (GET_MODE (op) != mode && mode != VOIDmode)
return 0;
}
/* Only accept reg, subreg(reg), const_int. */
-
int
-reg_or_int_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+reg_or_int_operand (rtx op, enum machine_mode mode)
{
if (GET_CODE (op) == CONST_INT)
return 1;
}
/* Return 1 if OP is an item in memory, given that we are in reload. */
-
int
-arm_reload_memory_operand (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+arm_reload_memory_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
int regno = true_regnum (op);
emitting patterns. In this latter case we cannot use memory_operand()
because it will fail on badly formed MEMs, which is precisely what we are
trying to catch. */
-
int
-bad_signed_byte_operand (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+bad_signed_byte_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
#if 0
if ((mode == QImode && !memory_operand (op, mode)) || GET_CODE (op) != MEM)
}
/* Return TRUE for valid operands for the rhs of an ARM instruction. */
-
int
-arm_rhs_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+arm_rhs_operand (rtx op, enum machine_mode mode)
{
return (s_register_operand (op, mode)
|| (GET_CODE (op) == CONST_INT && const_ok_for_arm (INTVAL (op))));
/* Return TRUE for valid operands for the
rhs of an ARM instruction, or a load. */
-
int
-arm_rhsm_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+arm_rhsm_operand (rtx op, enum machine_mode mode)
{
return (s_register_operand (op, mode)
|| (GET_CODE (op) == CONST_INT && const_ok_for_arm (INTVAL (op)))
/* Return TRUE for valid operands for the rhs of an ARM instruction, or if a
constant that is valid when negated. */
-
int
-arm_add_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+arm_add_operand (rtx op, enum machine_mode mode)
{
if (TARGET_THUMB)
return thumb_cmp_operand (op, mode);
}
int
-arm_not_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+arm_not_operand (rtx op, enum machine_mode mode)
{
return (s_register_operand (op, mode)
|| (GET_CODE (op) == CONST_INT
/* Return TRUE if the operand is a memory reference which contains an
offsettable address. */
-
int
-offsettable_memory_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+offsettable_memory_operand (rtx op, enum machine_mode mode)
{
if (mode == VOIDmode)
mode = GET_MODE (op);
/* Return TRUE if the operand is a memory reference which is, or can be
made word aligned by adjusting the offset. */
-
int
-alignable_memory_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+alignable_memory_operand (rtx op, enum machine_mode mode)
{
rtx reg;
/* Similar to s_register_operand, but does not allow hard integer
registers. */
-
int
-f_register_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+f_register_operand (rtx op, enum machine_mode mode)
{
if (GET_MODE (op) != mode && mode != VOIDmode)
return 0;
}
/* Return TRUE for valid operands for the rhs of an FPA instruction. */
-
int
-fpa_rhs_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+fpa_rhs_operand (rtx op, enum machine_mode mode)
{
if (s_register_operand (op, mode))
return TRUE;
}
int
-fpa_add_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+fpa_add_operand (rtx op, enum machine_mode mode)
{
if (s_register_operand (op, mode))
return TRUE;
}
/* Return nonzero if OP is a valid Cirrus memory address pattern. */
-
int
-cirrus_memory_offset (op)
- rtx op;
+cirrus_memory_offset (rtx op)
{
/* Reject eliminable registers. */
if (! (reload_in_progress || reload_completed)
}
/* Return nonzero if OP is a Cirrus or general register. */
-
int
-cirrus_register_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+cirrus_register_operand (rtx op, enum machine_mode mode)
{
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
}
/* Return nonzero if OP is a cirrus FP register. */
-
int
-cirrus_fp_register (op, mode)
- rtx op;
- enum machine_mode mode;
+cirrus_fp_register (rtx op, enum machine_mode mode)
{
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
}
/* Return nonzero if OP is a 6bit constant (0..63). */
-
int
-cirrus_shift_const (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+cirrus_shift_const (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
return (GET_CODE (op) == CONST_INT
&& INTVAL (op) >= 0
/* Returns TRUE if INSN is an "LDR REG, ADDR" instruction.
Use by the Cirrus Maverick code which has to workaround
a hardware bug triggered by such instructions. */
-
static bool
-arm_memory_load_p (insn)
- rtx insn;
+arm_memory_load_p (rtx insn)
{
rtx body, lhs, rhs;;
}
/* Return TRUE if INSN is a Cirrus instruction. */
-
static bool
-arm_cirrus_insn_p (insn)
- rtx insn;
+arm_cirrus_insn_p (rtx insn)
{
enum attr_cirrus attr;
}
/* Cirrus reorg for invalid instruction combinations. */
-
static void
-cirrus_reorg (first)
- rtx first;
+cirrus_reorg (rtx first)
{
enum attr_cirrus attr;
rtx body = PATTERN (first);
}
/* Return nonzero if OP is a constant power of two. */
-
int
-power_of_two_operand (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+power_of_two_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
if (GET_CODE (op) == CONST_INT)
{
Either: REG, SUBREG, CONST_DOUBLE or MEM(DImode_address).
Note that this disallows MEM(REG+REG), but allows
MEM(PRE/POST_INC/DEC(REG)). */
-
int
-di_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+di_operand (rtx op, enum machine_mode mode)
{
if (s_register_operand (op, mode))
return TRUE;
}
/* Like di_operand, but don't accept constants. */
-
int
-nonimmediate_di_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+nonimmediate_di_operand (rtx op, enum machine_mode mode)
{
if (s_register_operand (op, mode))
return TRUE;
Either: REG, SUBREG, CONST_DOUBLE or MEM(DImode_address).
Note that this disallows MEM(REG+REG), but allows
MEM(PRE/POST_INC/DEC(REG)). */
-
int
-soft_df_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+soft_df_operand (rtx op, enum machine_mode mode)
{
if (s_register_operand (op, mode))
return TRUE;
}
/* Like soft_df_operand, but don't accept constants. */
-
int
-nonimmediate_soft_df_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+nonimmediate_soft_df_operand (rtx op, enum machine_mode mode)
{
if (s_register_operand (op, mode))
return TRUE;
}
/* Return TRUE for valid index operands. */
-
int
-index_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+index_operand (rtx op, enum machine_mode mode)
{
return (s_register_operand (op, mode)
|| (immediate_operand (op, mode)
/* Return TRUE for valid shifts by a constant. This also accepts any
power of two on the (somewhat overly relaxed) assumption that the
shift operator in this case was a mult. */
-
int
-const_shift_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+const_shift_operand (rtx op, enum machine_mode mode)
{
return (power_of_two_operand (op, mode)
|| (immediate_operand (op, mode)
/* Return TRUE for arithmetic operators which can be combined with a multiply
(shift). */
-
int
-shiftable_operator (x, mode)
- rtx x;
- enum machine_mode mode;
+shiftable_operator (rtx x, enum machine_mode mode)
{
enum rtx_code code;
}
/* Return TRUE for binary logical operators. */
-
int
-logical_binary_operator (x, mode)
- rtx x;
- enum machine_mode mode;
+logical_binary_operator (rtx x, enum machine_mode mode)
{
enum rtx_code code;
}
/* Return TRUE for shift operators. */
-
int
-shift_operator (x, mode)
- rtx x;
- enum machine_mode mode;
+shift_operator (rtx x,enum machine_mode mode)
{
enum rtx_code code;
}
/* Return TRUE if x is EQ or NE. */
-
int
-equality_operator (x, mode)
- rtx x;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+equality_operator (rtx x, enum machine_mode mode ATTRIBUTE_UNUSED)
{
return GET_CODE (x) == EQ || GET_CODE (x) == NE;
}
/* Return TRUE if x is a comparison operator other than LTGT or UNEQ. */
-
int
-arm_comparison_operator (x, mode)
- rtx x;
- enum machine_mode mode;
+arm_comparison_operator (rtx x, enum machine_mode mode)
{
return (comparison_operator (x, mode)
&& GET_CODE (x) != LTGT
}
/* Return TRUE for SMIN SMAX UMIN UMAX operators. */
-
int
-minmax_operator (x, mode)
- rtx x;
- enum machine_mode mode;
+minmax_operator (rtx x, enum machine_mode mode)
{
enum rtx_code code = GET_CODE (x);
/* Return TRUE if this is the condition code register, if we aren't given
a mode, accept any class CCmode register. */
-
int
-cc_register (x, mode)
- rtx x;
- enum machine_mode mode;
+cc_register (rtx x, enum machine_mode mode)
{
if (mode == VOIDmode)
{
/* Return TRUE if this is the condition code register, if we aren't given
a mode, accept any class CCmode register which indicates a dominance
expression. */
-
int
-dominant_cc_register (x, mode)
- rtx x;
- enum machine_mode mode;
+dominant_cc_register (rtx x, enum machine_mode mode)
{
if (mode == VOIDmode)
{
return FALSE;
}
- if ( mode != CC_DNEmode && mode != CC_DEQmode
+ if (mode != CC_DNEmode && mode != CC_DEQmode
&& mode != CC_DLEmode && mode != CC_DLTmode
&& mode != CC_DGEmode && mode != CC_DGTmode
&& mode != CC_DLEUmode && mode != CC_DLTUmode
}
/* Return TRUE if X references a SYMBOL_REF. */
-
int
-symbol_mentioned_p (x)
- rtx x;
+symbol_mentioned_p (rtx x)
{
const char * fmt;
int i;
}
/* Return TRUE if X references a LABEL_REF. */
-
int
-label_mentioned_p (x)
- rtx x;
+label_mentioned_p (rtx x)
{
const char * fmt;
int i;
}
enum rtx_code
-minmax_code (x)
- rtx x;
+minmax_code (rtx x)
{
enum rtx_code code = GET_CODE (x);
}
/* Return 1 if memory locations are adjacent. */
-
int
-adjacent_mem_locations (a, b)
- rtx a, b;
+adjacent_mem_locations (rtx a, rtx b)
{
if ((GET_CODE (XEXP (a, 0)) == REG
|| (GET_CODE (XEXP (a, 0)) == PLUS
else
reg1 = REGNO (XEXP (b, 0));
- /* Don't accept any offset that will require multiple instructions to handle,
- since this would cause the arith_adjacentmem pattern to output an overlong
- sequence. */
+ /* Don't accept any offset that will require multiple
+ instructions to handle, since this would cause the
+ arith_adjacentmem pattern to output an overlong sequence. */
if (!const_ok_for_op (PLUS, val0) || !const_ok_for_op (PLUS, val1))
return 0;
/* Return 1 if OP is a load multiple operation. It is known to be
parallel and the first section will be tested. */
-
int
-load_multiple_operation (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
HOST_WIDE_INT count = XVECLEN (op, 0);
int dest_regno;
/* Return 1 if OP is a store multiple operation. It is known to be
parallel and the first section will be tested. */
-
int
-store_multiple_operation (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
HOST_WIDE_INT count = XVECLEN (op, 0);
int src_regno;
}
int
-load_multiple_sequence (operands, nops, regs, base, load_offset)
- rtx * operands;
- int nops;
- int * regs;
- int * base;
- HOST_WIDE_INT * load_offset;
+load_multiple_sequence (rtx *operands, int nops, int *regs, int *base,
+ HOST_WIDE_INT *load_offset)
{
int unsorted_regs[4];
HOST_WIDE_INT unsorted_offsets[4];
}
const char *
-emit_ldm_seq (operands, nops)
- rtx * operands;
- int nops;
+emit_ldm_seq (rtx *operands, int nops)
{
int regs[4];
int base_reg;
}
int
-store_multiple_sequence (operands, nops, regs, base, load_offset)
- rtx * operands;
- int nops;
- int * regs;
- int * base;
- HOST_WIDE_INT * load_offset;
+store_multiple_sequence (rtx *operands, int nops, int *regs, int *base,
+ HOST_WIDE_INT * load_offset)
{
int unsorted_regs[4];
HOST_WIDE_INT unsorted_offsets[4];
}
const char *
-emit_stm_seq (operands, nops)
- rtx * operands;
- int nops;
+emit_stm_seq (rtx *operands, int nops)
{
int regs[4];
int base_reg;
}
int
-multi_register_push (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+multi_register_push (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
if (GET_CODE (op) != PARALLEL
|| (GET_CODE (XVECEXP (op, 0, 0)) != SET)
/* Routines for use in generating RTL. */
rtx
-arm_gen_load_multiple (base_regno, count, from, up, write_back, unchanging_p,
- in_struct_p, scalar_p)
- int base_regno;
- int count;
- rtx from;
- int up;
- int write_back;
- int unchanging_p;
- int in_struct_p;
- int scalar_p;
+arm_gen_load_multiple (int base_regno, int count, rtx from, int up,
+ int write_back, int unchanging_p, int in_struct_p,
+ int scalar_p)
{
int i = 0, j;
rtx result;
}
rtx
-arm_gen_store_multiple (base_regno, count, to, up, write_back, unchanging_p,
- in_struct_p, scalar_p)
- int base_regno;
- int count;
- rtx to;
- int up;
- int write_back;
- int unchanging_p;
- int in_struct_p;
- int scalar_p;
+arm_gen_store_multiple (int base_regno, int count, rtx to, int up,
+ int write_back, int unchanging_p, int in_struct_p,
+ int scalar_p)
{
int i = 0, j;
rtx result;
}
int
-arm_gen_movstrqi (operands)
- rtx * operands;
+arm_gen_movstrqi (rtx *operands)
{
HOST_WIDE_INT in_words_to_go, out_words_to_go, last_bytes;
int i;
known to be alignable and of the form reg, or plus (reg, const). */
rtx
-arm_gen_rotated_half_load (memref)
- rtx memref;
+arm_gen_rotated_half_load (rtx memref)
{
HOST_WIDE_INT offset = 0;
rtx base = XEXP (memref, 0);
here. If we are unable to support a dominance comparison we return
CC mode. This will then fail to match for the RTL expressions that
generate this call. */
-
enum machine_mode
-arm_select_dominance_cc_mode (x, y, cond_or)
- rtx x;
- rtx y;
- HOST_WIDE_INT cond_or;
+arm_select_dominance_cc_mode (rtx x, rtx y, HOST_WIDE_INT cond_or)
{
enum rtx_code cond1, cond2;
int swapped = 0;
}
enum machine_mode
-arm_select_cc_mode (op, x, y)
- enum rtx_code op;
- rtx x;
- rtx y;
+arm_select_cc_mode (enum rtx_code op, rtx x, rtx y)
{
/* All floating point compares return CCFP if it is an equality
comparison, and CCFPE otherwise. */
/* X and Y are two things to compare using CODE. Emit the compare insn and
return the rtx for register 0 in the proper mode. FP means this is a
floating point compare: I don't think that it is needed on the arm. */
-
rtx
-arm_gen_compare_reg (code, x, y)
- enum rtx_code code;
- rtx x, y;
+arm_gen_compare_reg (enum rtx_code code, rtx x, rtx y)
{
enum machine_mode mode = SELECT_CC_MODE (code, x, y);
rtx cc_reg = gen_rtx_REG (mode, CC_REGNUM);
/* Generate a sequence of insns that will generate the correct return
address mask depending on the physical architecture that the program
is running on. */
-
rtx
-arm_gen_return_addr_mask ()
+arm_gen_return_addr_mask (void)
{
rtx reg = gen_reg_rtx (Pmode);
}
void
-arm_reload_in_hi (operands)
- rtx * operands;
+arm_reload_in_hi (rtx *operands)
{
rtx ref = operands[1];
rtx base, scratch;
scratch in operands[2] overlaps either the input value or output address
in some way, then that value must die in this insn (we absolutely need
two scratch registers for some corner cases). */
-
void
-arm_reload_out_hi (operands)
- rtx * operands;
+arm_reload_out_hi (rtx *operands)
{
rtx ref = operands[0];
rtx outval = operands[1];
}
\f
/* Print a symbolic form of X to the debug file, F. */
-
static void
-arm_print_value (f, x)
- FILE * f;
- rtx x;
+arm_print_value (FILE *f, rtx x)
{
switch (GET_CODE (x))
{
/* Determines if INSN is the start of a jump table. Returns the end
of the TABLE or NULL_RTX. */
-
static rtx
-is_jump_table (insn)
- rtx insn;
+is_jump_table (rtx insn)
{
rtx table;
#endif
static HOST_WIDE_INT
-get_jump_table_size (insn)
- rtx insn;
+get_jump_table_size (rtx insn)
{
/* ADDR_VECs only take room if read-only data does into the text
section. */
/* Move a minipool fix MP from its current location to before MAX_MP.
If MAX_MP is NULL, then MP doesn't need moving, but the addressing
contrains may need updating. */
-
static Mnode *
-move_minipool_fix_forward_ref (mp, max_mp, max_address)
- Mnode * mp;
- Mnode * max_mp;
- HOST_WIDE_INT max_address;
+move_minipool_fix_forward_ref (Mnode *mp, Mnode *max_mp,
+ HOST_WIDE_INT max_address)
{
/* This should never be true and the code below assumes these are
different. */
/* Add a constant to the minipool for a forward reference. Returns the
node added or NULL if the constant will not fit in this pool. */
-
static Mnode *
-add_minipool_forward_ref (fix)
- Mfix * fix;
+add_minipool_forward_ref (Mfix *fix)
{
/* If set, max_mp is the first pool_entry that has a lower
constraint than the one we are trying to add. */
}
static Mnode *
-move_minipool_fix_backward_ref (mp, min_mp, min_address)
- Mnode * mp;
- Mnode * min_mp;
- HOST_WIDE_INT min_address;
+move_minipool_fix_backward_ref (Mnode *mp, Mnode *min_mp,
+ HOST_WIDE_INT min_address)
{
HOST_WIDE_INT offset;
somewhat confusing because the calculated offsets for each fix do
not take into account the size of the pool (which is still under
construction. */
-
static Mnode *
-add_minipool_backward_ref (fix)
- Mfix * fix;
+add_minipool_backward_ref (Mfix *fix)
{
/* If set, min_mp is the last pool_entry that has a lower constraint
than the one we are trying to add. */
- Mnode * min_mp = NULL;
+ Mnode *min_mp = NULL;
/* This can be negative, since it is only a constraint. */
HOST_WIDE_INT min_address = fix->address - fix->backwards;
- Mnode * mp;
+ Mnode *mp;
/* If we can't reach the current pool from this insn, or if we can't
insert this entry at the end of the pool without pushing other
}
static void
-assign_minipool_offsets (barrier)
- Mfix * barrier;
+assign_minipool_offsets (Mfix *barrier)
{
HOST_WIDE_INT offset = 0;
- Mnode * mp;
+ Mnode *mp;
minipool_barrier = barrier;
/* Output the literal table */
static void
-dump_minipool (scan)
- rtx scan;
+dump_minipool (rtx scan)
{
- Mnode * mp;
- Mnode * nmp;
+ Mnode *mp;
+ Mnode *nmp;
if (rtl_dump_file)
fprintf (rtl_dump_file,
}
/* Return the cost of forcibly inserting a barrier after INSN. */
-
static int
-arm_barrier_cost (insn)
- rtx insn;
+arm_barrier_cost (rtx insn)
{
/* Basing the location of the pool on the loop depth is preferable,
but at the moment, the basic block information seems to be
(FIX->address,MAX_ADDRESS) to forcibly insert a minipool barrier.
Create the barrier by inserting a jump and add a new fix entry for
it. */
-
static Mfix *
-create_fix_barrier (fix, max_address)
- Mfix * fix;
- HOST_WIDE_INT max_address;
+create_fix_barrier (Mfix *fix, HOST_WIDE_INT max_address)
{
HOST_WIDE_INT count = 0;
rtx barrier;
/* Record that there is a natural barrier in the insn stream at
ADDRESS. */
static void
-push_minipool_barrier (insn, address)
- rtx insn;
- HOST_WIDE_INT address;
+push_minipool_barrier (rtx insn, HOST_WIDE_INT address)
{
Mfix * fix = (Mfix *) obstack_alloc (&minipool_obstack, sizeof (* fix));
fixing; VALUE is the constant that must be loaded, which is of type
MODE. */
static void
-push_minipool_fix (insn, address, loc, mode, value)
- rtx insn;
- HOST_WIDE_INT address;
- rtx * loc;
- enum machine_mode mode;
- rtx value;
+push_minipool_fix (rtx insn, HOST_WIDE_INT address, rtx *loc,
+ enum machine_mode mode, rtx value)
{
Mfix * fix = (Mfix *) obstack_alloc (&minipool_obstack, sizeof (* fix));
needed. The function returns TRUE is any fixups were needed/pushed.
This is used by arm_memory_load_p() which needs to know about loads
of constants that will be converted into minipool loads. */
-
static bool
-note_invalid_constants (insn, address, do_pushes)
- rtx insn;
- HOST_WIDE_INT address;
- int do_pushes;
+note_invalid_constants (rtx insn, HOST_WIDE_INT address, int do_pushes)
{
bool result = false;
int opno;
load addresses a limited distance around the pc. We do some
special munging to move the constant pool values to the correct
point in the code. */
-
static void
-arm_reorg ()
+arm_reorg (void)
{
rtx insn;
HOST_WIDE_INT address = 0;
/* If the rtx is the correct value then return the string of the number.
In this way we can ensure that valid double constants are generated even
when cross compiling. */
-
const char *
-fp_immediate_constant (x)
- rtx x;
+fp_immediate_constant (rtx x)
{
REAL_VALUE_TYPE r;
int i;
}
/* As for fp_immediate_constant, but value is passed directly, not in rtx. */
-
static const char *
-fp_const_from_val (r)
- REAL_VALUE_TYPE * r;
+fp_const_from_val (REAL_VALUE_TYPE *r)
{
int i;
MASK is the ARM register set mask of which only bits 0-15 are important.
REG is the base register, either the frame pointer or the stack pointer,
INSTR is the possibly suffixed load or store instruction. */
-
static void
-print_multi_reg (stream, instr, reg, mask)
- FILE * stream;
- const char * instr;
- int reg;
- int mask;
+print_multi_reg (FILE *stream, const char *instr, int reg, int mask)
{
int i;
int not_first = FALSE;
}
/* Output a 'call' insn. */
-
const char *
-output_call (operands)
- rtx * operands;
+output_call (rtx *operands)
{
/* Handle calls to lr using ip (which may be clobbered in subr anyway). */
}
static int
-eliminate_lr2ip (x)
- rtx * x;
+eliminate_lr2ip (rtx *x)
{
int something_changed = 0;
rtx x0 = * x;
}
/* Output a 'call' insn that is a reference in memory. */
-
const char *
-output_call_mem (operands)
- rtx * operands;
+output_call_mem (rtx *operands)
{
operands[0] = copy_rtx (operands[0]); /* Be ultra careful. */
/* Handle calls using lr by using ip (which may be clobbered in subr anyway). */
/* Output a move from arm registers to an fpa registers.
OPERANDS[0] is an fpa register.
OPERANDS[1] is the first registers of an arm register pair. */
-
const char *
-output_mov_long_double_fpa_from_arm (operands)
- rtx * operands;
+output_mov_long_double_fpa_from_arm (rtx *operands)
{
int arm_reg0 = REGNO (operands[1]);
rtx ops[3];
/* Output a move from an fpa register to arm registers.
OPERANDS[0] is the first registers of an arm register pair.
OPERANDS[1] is an fpa register. */
-
const char *
-output_mov_long_double_arm_from_fpa (operands)
- rtx * operands;
+output_mov_long_double_arm_from_fpa (rtx *operands)
{
int arm_reg0 = REGNO (operands[0]);
rtx ops[3];
/* Output a move from arm registers to arm registers of a long double
OPERANDS[0] is the destination.
OPERANDS[1] is the source. */
-
const char *
-output_mov_long_double_arm_from_arm (operands)
- rtx * operands;
+output_mov_long_double_arm_from_arm (rtx *operands)
{
/* We have to be careful here because the two might overlap. */
int dest_start = REGNO (operands[0]);
/* Output a move from arm registers to an fpa registers.
OPERANDS[0] is an fpa register.
OPERANDS[1] is the first registers of an arm register pair. */
-
const char *
-output_mov_double_fpa_from_arm (operands)
- rtx * operands;
+output_mov_double_fpa_from_arm (rtx *operands)
{
int arm_reg0 = REGNO (operands[1]);
rtx ops[2];
/* Output a move from an fpa register to arm registers.
OPERANDS[0] is the first registers of an arm register pair.
OPERANDS[1] is an fpa register. */
-
const char *
-output_mov_double_arm_from_fpa (operands)
- rtx * operands;
+output_mov_double_arm_from_fpa (rtx *operands)
{
int arm_reg0 = REGNO (operands[0]);
rtx ops[2];
/* Output a move between double words.
It must be REG<-REG, REG<-CONST_DOUBLE, REG<-CONST_INT, REG<-MEM
or MEM<-REG and all MEMs must be offsettable addresses. */
-
const char *
-output_move_double (operands)
- rtx * operands;
+output_move_double (rtx *operands)
{
enum rtx_code code0 = GET_CODE (operands[0]);
enum rtx_code code1 = GET_CODE (operands[1]);
/* Output an arbitrary MOV reg, #n.
OPERANDS[0] is a register. OPERANDS[1] is a const_int. */
-
const char *
-output_mov_immediate (operands)
- rtx * operands;
+output_mov_immediate (rtx *operands)
{
HOST_WIDE_INT n = INTVAL (operands[1]);
/* Output an ADD r, s, #n where n may be too big for one instruction.
If adding zero to one register, output nothing. */
-
const char *
-output_add_immediate (operands)
- rtx * operands;
+output_add_immediate (rtx *operands)
{
HOST_WIDE_INT n = INTVAL (operands[2]);
INSTR2 is the output pattern to use for subsequent constants.
IMMED_OP is the index of the constant slot in OPERANDS.
N is the constant value. */
-
static const char *
-output_multi_immediate (operands, instr1, instr2, immed_op, n)
- rtx * operands;
- const char * instr1;
- const char * instr2;
- int immed_op;
- HOST_WIDE_INT n;
+output_multi_immediate (rtx *operands, const char *instr1, const char *instr2,
+ int immed_op, HOST_WIDE_INT n)
{
#if HOST_BITS_PER_WIDE_INT > 32
n &= 0xffffffff;
The returned result should not be overwritten. OP is the rtx of the
operation. SHIFT_FIRST_ARG is TRUE if the first argument of the operator
was shifted. */
-
const char *
-arithmetic_instr (op, shift_first_arg)
- rtx op;
- int shift_first_arg;
+arithmetic_instr (rtx op, int shift_first_arg)
{
switch (GET_CODE (op))
{
OP is the rtx code of the shift.
On exit, *AMOUNTP will be -1 if the shift is by a register, or a constant
shift. */
-
static const char *
-shift_op (op, amountp)
- rtx op;
- HOST_WIDE_INT *amountp;
+shift_op (rtx op, HOST_WIDE_INT *amountp)
{
const char * mnem;
enum rtx_code code = GET_CODE (op);
/* Obtain the shift from the POWER of two. */
static HOST_WIDE_INT
-int_log2 (power)
- HOST_WIDE_INT power;
+int_log2 (HOST_WIDE_INT power)
{
HOST_WIDE_INT shift = 0;
{
if (shift > 31)
abort ();
- shift ++;
+ shift++;
}
return shift;
#define MAX_ASCII_LEN 51
void
-output_ascii_pseudo_op (stream, p, len)
- FILE * stream;
- const unsigned char * p;
- int len;
+output_ascii_pseudo_op (FILE *stream, const unsigned char *p, int len)
{
int i;
int len_so_far = 0;
/* Compute the register sabe mask for registers 0 through 12
inclusive. This code is used by both arm_compute_save_reg_mask
and arm_compute_initial_elimination_offset. */
-
static unsigned long
-arm_compute_save_reg0_reg12_mask ()
+arm_compute_save_reg0_reg12_mask (void)
{
unsigned long func_type = arm_current_func_type ();
unsigned int save_reg_mask = 0;
saved on the stack for the current function. */
static unsigned long
-arm_compute_save_reg_mask ()
+arm_compute_save_reg_mask (void)
{
unsigned int save_reg_mask = 0;
unsigned long func_type = arm_current_func_type ();
/* Generate a function exit sequence. If REALLY_RETURN is true, then do
everything bar the final return instruction. */
-
const char *
-output_return_instruction (operand, really_return, reverse)
- rtx operand;
- int really_return;
- int reverse;
+output_return_instruction (rtx operand, int really_return, int reverse)
{
char conditional[10];
char instr[100];
a leaf function. These function types will not contain a stack
backtrace structure, therefore it is not possible to determine the
function name. */
-
void
-arm_poke_function_name (stream, name)
- FILE * stream;
- const char * name;
+arm_poke_function_name (FILE *stream, const char *name)
{
unsigned long alignlength;
unsigned long length;
/* Place some comments into the assembler stream
describing the current function. */
-
static void
-arm_output_function_prologue (f, frame_size)
- FILE * f;
- HOST_WIDE_INT frame_size;
+arm_output_function_prologue (FILE *f, HOST_WIDE_INT frame_size)
{
unsigned long func_type;
}
const char *
-arm_output_epilogue (really_return)
- int really_return;
+arm_output_epilogue (int really_return)
{
int reg;
unsigned long saved_regs_mask;
}
static void
-arm_output_function_epilogue (file, frame_size)
- FILE *file ATTRIBUTE_UNUSED;
- HOST_WIDE_INT frame_size;
+arm_output_function_epilogue (FILE *file ATTRIBUTE_UNUSED,
+ HOST_WIDE_INT frame_size)
{
if (TARGET_THUMB)
{
Unfortunately, since this insn does not reflect very well the actual
semantics of the operation, we need to annotate the insn for the benefit
of DWARF2 frame unwind information. */
-
static rtx
-emit_multi_reg_push (mask)
- int mask;
+emit_multi_reg_push (int mask)
{
int num_regs = 0;
int num_dwarf_regs;
}
static rtx
-emit_sfm (base_reg, count)
- int base_reg;
- int count;
+emit_sfm (int base_reg, int count)
{
rtx par;
rtx dwarf;
The sign of the number returned reflects the direction of stack
growth, so the values are positive for all eliminations except
from the soft frame pointer to the hard frame pointer. */
-
unsigned int
-arm_compute_initial_elimination_offset (from, to)
- unsigned int from;
- unsigned int to;
+arm_compute_initial_elimination_offset (unsigned int from, unsigned int to)
{
unsigned int local_vars = arm_get_frame_size ();
unsigned int outgoing_args = current_function_outgoing_args_size;
/* Calculate the size of the stack frame, taking into account any
padding that is required to ensure stack-alignment. */
-
HOST_WIDE_INT
-arm_get_frame_size ()
+arm_get_frame_size (void)
{
int regno;
}
/* Generate the prologue instructions for entry into an ARM function. */
-
void
-arm_expand_prologue ()
+arm_expand_prologue (void)
{
int reg;
rtx amount;
before output.
If CODE is 'B' then output a bitwise inverted value of X (a const int).
If X is a REG and CODE is `M', output a ldm/stm style multi-reg. */
-
void
-arm_print_operand (stream, x, code)
- FILE * stream;
- rtx x;
- int code;
+arm_print_operand (FILE *stream, rtx x, int code)
{
switch (code)
{
#ifndef AOF_ASSEMBLER
/* Target hook for assembling integer objects. The ARM version needs to
handle word-sized values specially. */
-
static bool
-arm_assemble_integer (x, size, aligned_p)
- rtx x;
- unsigned int size;
- int aligned_p;
+arm_assemble_integer (rtx x, unsigned int size, int aligned_p)
{
if (size == UNITS_PER_WORD && aligned_p)
{
/* Returns the index of the ARM condition code string in
`arm_condition_codes'. COMPARISON should be an rtx like
`(eq (...) (...))'. */
-
static enum arm_cond_code
-get_arm_condition_code (comparison)
- rtx comparison;
+get_arm_condition_code (rtx comparison)
{
enum machine_mode mode = GET_MODE (XEXP (comparison, 0));
int code;
abort ();
}
-
void
-arm_final_prescan_insn (insn)
- rtx insn;
+arm_final_prescan_insn (rtx insn)
{
/* BODY will hold the body of INSN. */
rtx body = PATTERN (insn);
/* If this is an unconditional branch to the same label, succeed.
If it is to another label, do nothing. If it is conditional,
fail. */
- /* XXX Probably, the tests for SET and the PC are unnecessary. */
+ /* XXX Probably, the tests for SET and the PC are
+ unnecessary. */
scanbody = PATTERN (this_insn);
if (GET_CODE (scanbody) == SET
/* Returns true if REGNO is a valid register
for holding a quantity of tyoe MODE. */
-
int
-arm_hard_regno_mode_ok (regno, mode)
- unsigned int regno;
- enum machine_mode mode;
+arm_hard_regno_mode_ok (unsigned int regno, enum machine_mode mode)
{
if (GET_MODE_CLASS (mode) == MODE_CC)
return regno == CC_REGNUM;
}
int
-arm_regno_class (regno)
- int regno;
+arm_regno_class (int regno)
{
if (TARGET_THUMB)
{
/* Handle a special case when computing the offset
of an argument from the frame pointer. */
-
int
-arm_debugger_arg_offset (value, addr)
- int value;
- rtx addr;
+arm_debugger_arg_offset (int value, rtx addr)
{
rtx insn;
checking to see if any of the variables created in that
function match the RTX called 'orig'. If they do then
replace them with the RTX called 'new'. */
-
static void
-replace_symbols_in_block (block, orig, new)
- tree block;
- rtx orig;
- rtx new;
+replace_symbols_in_block (tree block, rtx orig, rtx new)
{
for (; block; block = BLOCK_CHAIN (block))
{
/* Return the number (counting from 0) of
the least significant set bit in MASK. */
-#ifdef __GNUC__
-inline
-#endif
-static int
-number_of_first_bit_set (mask)
- int mask;
+inline static int
+number_of_first_bit_set (int mask)
{
int bit;
If 'reg_containing_return_addr' is -1, then the return address is
actually on the stack, at the stack pointer. */
static void
-thumb_exit (f, reg_containing_return_addr, eh_ofs)
- FILE * f;
- int reg_containing_return_addr;
- rtx eh_ofs;
+thumb_exit (FILE *f, int reg_containing_return_addr, rtx eh_ofs)
{
unsigned regs_available_for_popping;
unsigned regs_to_pop;
}
/* Emit code to push or pop registers to or from the stack. */
-
static void
-thumb_pushpop (f, mask, push)
- FILE * f;
- int mask;
- int push;
+thumb_pushpop (FILE *f, int mask, int push)
{
int regno;
int lo_mask = mask & 0xFF;
}
\f
void
-thumb_final_prescan_insn (insn)
- rtx insn;
+thumb_final_prescan_insn (rtx insn)
{
if (flag_print_asm_name)
asm_fprintf (asm_out_file, "%@ 0x%04x\n",
}
int
-thumb_shiftable_const (val)
- unsigned HOST_WIDE_INT val;
+thumb_shiftable_const (unsigned HOST_WIDE_INT val)
{
unsigned HOST_WIDE_INT mask = 0xff;
int i;
/* Returns nonzero if the current function contains,
or might contain a far jump. */
-
int
-thumb_far_jump_used_p (in_prologue)
- int in_prologue;
+thumb_far_jump_used_p (int in_prologue)
{
rtx insn;
}
/* Return nonzero if FUNC must be entered in ARM mode. */
-
int
-is_called_in_ARM_mode (func)
- tree func;
+is_called_in_ARM_mode (tree func)
{
if (TREE_CODE (func) != FUNCTION_DECL)
abort ();
}
/* The bits which aren't usefully expanded as rtl. */
-
const char *
-thumb_unexpanded_epilogue ()
+thumb_unexpanded_epilogue (void)
{
int regno;
int live_regs_mask = 0;
}
/* Functions to save and restore machine-specific function data. */
-
static struct machine_function *
-arm_init_machine_status ()
+arm_init_machine_status (void)
{
struct machine_function *machine;
machine = (machine_function *) ggc_alloc_cleared (sizeof (machine_function));
/* Return an RTX indicating where the return address to the
calling function can be found. */
-
rtx
-arm_return_addr (count, frame)
- int count;
- rtx frame ATTRIBUTE_UNUSED;
+arm_return_addr (int count, rtx frame ATTRIBUTE_UNUSED)
{
if (count != 0)
return NULL_RTX;
}
/* Do anything needed before RTL is emitted for each function. */
-
void
-arm_init_expanders ()
+arm_init_expanders (void)
{
/* Arrange to initialize and mark the machine per-function status. */
init_machine_status = arm_init_machine_status;
}
HOST_WIDE_INT
-thumb_get_frame_size ()
+thumb_get_frame_size (void)
{
int regno;
}
/* Generate the rest of a function's prologue. */
-
void
-thumb_expand_prologue ()
+thumb_expand_prologue (void)
{
HOST_WIDE_INT amount = (thumb_get_frame_size ()
+ current_function_outgoing_args_size);
}
void
-thumb_expand_epilogue ()
+thumb_expand_epilogue (void)
{
HOST_WIDE_INT amount = (thumb_get_frame_size ()
+ current_function_outgoing_args_size);
}
static void
-thumb_output_function_prologue (f, size)
- FILE * f;
- HOST_WIDE_INT size ATTRIBUTE_UNUSED;
+thumb_output_function_prologue (FILE *f, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
{
int live_regs_mask = 0;
int high_regs_pushed = 0;
/* Handle the case of a double word load into a low register from
a computed memory address. The computed address may involve a
register which is overwritten by the load. */
-
const char *
-thumb_load_double_from_address (operands)
- rtx *operands;
+thumb_load_double_from_address (rtx *operands)
{
rtx addr;
rtx base;
return "";
}
-
const char *
-thumb_output_move_mem_multiple (n, operands)
- int n;
- rtx * operands;
+thumb_output_move_mem_multiple (int n, rtx *operands)
{
rtx tmp;
}
/* Routines for generating rtl. */
-
void
-thumb_expand_movstrqi (operands)
- rtx * operands;
+thumb_expand_movstrqi (rtx *operands)
{
rtx out = copy_to_mode_reg (SImode, XEXP (operands[0], 0));
rtx in = copy_to_mode_reg (SImode, XEXP (operands[1], 0));
}
int
-thumb_cmp_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+thumb_cmp_operand (rtx op, enum machine_mode mode)
{
return ((GET_CODE (op) == CONST_INT
&& (unsigned HOST_WIDE_INT) (INTVAL (op)) < 256)
}
static const char *
-thumb_condition_code (x, invert)
- rtx x;
- int invert;
+thumb_condition_code (rtx x, int invert)
{
static const char * const conds[] =
{
}
/* Handle storing a half-word to memory during reload. */
-
void
-thumb_reload_out_hi (operands)
- rtx * operands;
+thumb_reload_out_hi (rtx *operands)
{
emit_insn (gen_thumb_movhi_clobber (operands[0], operands[1], operands[2]));
}
-/* Handle storing a half-word to memory during reload. */
-
+/* Handle reading a half-word from memory during reload. */
void
-thumb_reload_in_hi (operands)
- rtx * operands ATTRIBUTE_UNUSED;
+thumb_reload_in_hi (rtx *operands ATTRIBUTE_UNUSED)
{
abort ();
}
/* Return the length of a function name prefix
that starts with the character 'c'. */
-
static int
-arm_get_strip_length (c)
- int c;
+arm_get_strip_length (int c)
{
switch (c)
{
/* Return a pointer to a function's name with any
and all prefix encodings stripped from it. */
-
const char *
-arm_strip_name_encoding (name)
- const char * name;
+arm_strip_name_encoding (const char *name)
{
int skip;
/* If there is a '*' anywhere in the name's prefix, then
emit the stripped name verbatim, otherwise prepend an
underscore if leading underscores are being used. */
-
void
-arm_asm_output_labelref (stream, name)
- FILE * stream;
- const char * name;
+arm_asm_output_labelref (FILE *stream, const char *name)
{
int skip;
int verbatim = 0;
static struct pic_chain * aof_pic_chain = NULL;
rtx
-aof_pic_entry (x)
- rtx x;
+aof_pic_entry (rtx x)
{
struct pic_chain ** chainp;
int offset;
}
void
-aof_dump_pic_table (f)
- FILE * f;
+aof_dump_pic_table (FILE *f)
{
struct pic_chain * chain;
int arm_text_section_count = 1;
char *
-aof_text_section ()
+aof_text_section (void )
{
static char buf[100];
sprintf (buf, "\tAREA |C$$code%d|, CODE, READONLY",
static int arm_data_section_count = 1;
char *
-aof_data_section ()
+aof_data_section (void)
{
static char buf[100];
sprintf (buf, "\tAREA |C$$data%d|, DATA", arm_data_section_count++);
static struct import * imports_list = NULL;
void
-aof_add_import (name)
- const char * name;
+aof_add_import (const char *name)
{
struct import * new;
}
void
-aof_delete_import (name)
- const char * name;
+aof_delete_import (const char *name)
{
struct import ** old;
int arm_main_function = 0;
static void
-aof_dump_imports (f)
- FILE * f;
+aof_dump_imports (FILE *f)
{
/* The AOF assembler needs this to cause the startup code to be extracted
from the library. Brining in __main causes the whole thing to work
}
static void
-aof_globalize_label (stream, name)
- FILE *stream;
- const char *name;
+aof_globalize_label (FILE *stream, const char *name)
{
default_globalize_label (stream, name);
if (! strcmp (name, "main"))
}
static void
-aof_file_end ()
+aof_file_end (void)
{
if (flag_pic)
aof_dump_pic_table (asm_out_file);
used before the section type. */
static void
-arm_elf_asm_named_section (name, flags)
- const char *name;
- unsigned int flags;
+arm_elf_asm_named_section (const char *name, unsigned int flags)
{
char flagchars[10], *f = flagchars;
simplification. */
static void
-arm_encode_section_info (decl, rtl, first)
- tree decl;
- rtx rtl;
- int first;
+arm_encode_section_info (tree decl, rtx rtl, int first)
{
/* This doesn't work with AOF syntax, since the string table may be in
a different AREA. */
#endif /* !ARM_PE */
static void
-arm_internal_label (stream, prefix, labelno)
- FILE *stream;
- const char *prefix;
- unsigned long labelno;
+arm_internal_label (FILE *stream, const char *prefix, unsigned long labelno)
{
if (arm_ccfsm_state == 3 && (unsigned) arm_target_label == labelno
&& !strcmp (prefix, "L"))
/* Output code to add DELTA to the first argument, and then jump
to FUNCTION. Used for C++ multiple inheritance. */
-
static void
-arm_output_mi_thunk (file, thunk, delta, vcall_offset, function)
- FILE *file;
- tree thunk ATTRIBUTE_UNUSED;
- HOST_WIDE_INT delta;
- HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED;
- tree function;
+arm_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
+ HOST_WIDE_INT delta,
+ HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
+ tree function)
{
int mi_delta = delta;
const char *const mi_op = mi_delta < 0 ? "sub" : "add";
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