emmc: optimize the conditions of fixdiv calc [1/1]
authorNan Li <nan.li@amlogic.com>
Fri, 1 Feb 2019 01:59:00 +0000 (09:59 +0800)
committerJianxin Pan <jianxin.pan@amlogic.com>
Wed, 20 Feb 2019 06:38:03 +0000 (22:38 -0800)
PD#SWPL-4857

Problem:
fixdiv calc Affect the use of other chips

Solution:
Adjust the usage conditions for the fixdiv calc func, witch
pdata->calc_f from dts.

Verify:
verify by g12b

Change-Id: I9598e2a24f76c76f4312c2694029fe4bb0f534d4
Signed-off-by: Nan Li <nan.li@amlogic.com>
drivers/amlogic/mmc/aml_sd_emmc.c
drivers/amlogic/mmc/aml_sd_emmc_v3.c
include/linux/amlogic/aml_sd_emmc_internal.h

index c43866c..9cb1d42 100644 (file)
@@ -1064,7 +1064,7 @@ static int aml_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
 
 }
 
-static void aml_mmc_clk_switch_off(struct amlsd_platform *pdata)
+void aml_mmc_clk_switch_off(struct amlsd_platform *pdata)
 {
        u32 vcfg = 0;
        struct sd_emmc_config *conf = (struct sd_emmc_config *)&vcfg;
index 0fc7b85..802b590 100644 (file)
@@ -116,7 +116,6 @@ int meson_mmc_clk_init_v3(struct amlsd_host *host)
        u32 vconf = 0;
        struct sd_emmc_config *pconf = (struct sd_emmc_config *)&vconf;
        struct mmc_phase *init = &(host->data->sdmmc.init);
-       struct mmc_phase *calc = &(host->data->sdmmc.calc);
 
        writel(0, host->base + SD_EMMC_ADJUST_V3);
        writel(0, host->base + SD_EMMC_DELAY1_V3);
@@ -134,11 +133,6 @@ int meson_mmc_clk_init_v3(struct amlsd_host *host)
        pclkc->core_phase = init->core_phase;     /* 2: 180 phase */
        pclkc->rx_phase = init->rx_phase;
        pclkc->tx_phase = init->tx_phase;
-       if ((host->data->chip_type >= MMC_CHIP_G12A)
-                       && (host->data->chip_type != MMC_CHIP_TL1)) {
-               pclkc->core_phase = calc->core_phase;
-               pclkc->tx_phase = calc->tx_phase;
-       }
        pclkc->always_on = 1;     /* Keep clock always on */
        writel(vclkc, host->base + SD_EMMC_CLOCK_V3);
 
@@ -180,7 +174,7 @@ static int meson_mmc_clk_set_rate_v3(struct mmc_host *mmc,
 
 #ifdef SD_EMMC_CLK_CTRL
        if (clk_ios == 0) {
-               aml_mmc_clk_switch_off(host);
+               aml_mmc_clk_switch_off(pdata);
                return ret;
        }
 
@@ -282,10 +276,12 @@ static int meson_mmc_clk_set_rate_v3(struct mmc_host *mmc,
 
        /* (re)start clock, if non-zero */
        if (clk_ios) {
-               vclkc = readl(host->base + SD_EMMC_CLOCK_V3);
-               pdata->clk_lay.source
-                       = clk_get_rate(host->cfg_div_clk) * clkc->div;
-               pdata->clk_lay.core = clk_get_rate(host->cfg_div_clk);
+               if (pdata->calc_f) {
+                       vclkc = readl(host->base + SD_EMMC_CLOCK_V3);
+                       pdata->clk_lay.source
+                               = clk_get_rate(host->cfg_div_clk) * clkc->div;
+                       pdata->clk_lay.core = clk_get_rate(host->cfg_div_clk);
+               }
 
                vcfg = readl(host->base + SD_EMMC_CFG);
                conf->stop_clk = 0;
@@ -370,9 +366,7 @@ static void aml_sd_emmc_set_timing_v3(struct amlsd_platform *pdata,
                /* overide co-phase by dts */
                if (pdata->co_phase)
                        clkc->core_phase = pdata->co_phase;
-               if ((pdata->calc_f)
-                       && ((host->data->chip_type >= MMC_CHIP_G12A)
-                       && (host->data->chip_type != MMC_CHIP_TL1))) {
+               if (pdata->calc_f) {
                        clkc->core_phase = para->calc.core_phase;
                        clkc->tx_phase = para->calc.tx_phase;
                }
@@ -382,9 +376,7 @@ static void aml_sd_emmc_set_timing_v3(struct amlsd_platform *pdata,
        } else if (timing == MMC_TIMING_SD_HS) {
                if (aml_card_type_non_sdio(pdata))
                        clkc->core_phase = para->sd_hs.core_phase;
-               if ((pdata->calc_f)
-                               && ((host->data->chip_type >= MMC_CHIP_G12A)
-                               && (host->data->chip_type != MMC_CHIP_TL1))) {
+               if (pdata->calc_f) {
                        clkc->core_phase = para->calc.core_phase;
                        clkc->tx_phase = para->calc.tx_phase;
                }
@@ -400,9 +392,7 @@ static void aml_sd_emmc_set_timing_v3(struct amlsd_platform *pdata,
                }
        }
 
-       if ((pdata->calc_f)
-                       && ((host->data->chip_type >= MMC_CHIP_G12A)
-                       && (host->data->chip_type != MMC_CHIP_TL1))) {
+       if (pdata->calc_f) {
                if (timing <= MMC_TIMING_SD_HS) {
                        ret = aml_fixdiv_calc(&fixdiv, &pdata->clk_lay);
                        if (!ret) {
index a63caf1..e28f9c3 100644 (file)
@@ -16,8 +16,8 @@
  */
 
 #ifndef __AML_SD_EMMC_INTERNAL_H__
-
 #define __AML_SD_EMMC_INTERNAL_H__
+
 extern int aml_emmc_clktree_init(struct amlsd_host *host);
 
 extern int meson_mmc_clk_init_v3(struct amlsd_host *host);