dt-bindings: clock: renesas,rzg2l: Document RZ/Five SoC
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tue, 26 Jul 2022 17:45:25 +0000 (18:45 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 2 Sep 2022 08:47:30 +0000 (10:47 +0200)
The CPG block on the RZ/Five SoC is almost identical to one found on the
RZ/G2UL SoC. "renesas,r9a07g043-cpg" compatible string will be used on
the RZ/Five SoC so to make this clear, update the comment to include
RZ/Five SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220726174525.620-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml

index d036675..487f74c 100644 (file)
@@ -24,7 +24,7 @@ description: |
 properties:
   compatible:
     enum:
-      - renesas,r9a07g043-cpg # RZ/G2UL{Type-1,Type-2}
+      - renesas,r9a07g043-cpg # RZ/G2UL{Type-1,Type-2} and RZ/Five
       - renesas,r9a07g044-cpg # RZ/G2{L,LC}
       - renesas,r9a07g054-cpg # RZ/V2L
       - renesas,r9a09g011-cpg # RZ/V2M