iwlwifi: move iwl4965_set_pwr_src to iwl4965-base.c
authorTomas Winkler <tomas.winkler@intel.com>
Fri, 18 Jul 2008 05:53:04 +0000 (13:53 +0800)
committerJohn W. Linville <linville@tuxdriver.com>
Mon, 4 Aug 2008 19:09:08 +0000 (15:09 -0400)
This patch moves iwl4965_set_pwr_src to iwl4965-base.c.

Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Zhu Yi <yi.zhu@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/iwlwifi/iwl-4965.c
drivers/net/wireless/iwlwifi/iwl4965-base.c

index 9ae8525..c0ba28f 100644 (file)
@@ -341,39 +341,6 @@ err:
        return -EINVAL;
 
 }
-int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
-{
-       int ret;
-       unsigned long flags;
-
-       spin_lock_irqsave(&priv->lock, flags);
-       ret = iwl_grab_nic_access(priv);
-       if (ret) {
-               spin_unlock_irqrestore(&priv->lock, flags);
-               return ret;
-       }
-
-       if (src == IWL_PWR_SRC_VAUX) {
-               u32 val;
-               ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
-                                           &val);
-
-               if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
-                       iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
-                                              APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
-                                              ~APMG_PS_CTRL_MSK_PWR_SRC);
-               }
-       } else {
-               iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
-                                      APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
-                                      ~APMG_PS_CTRL_MSK_PWR_SRC);
-       }
-
-       iwl_release_nic_access(priv);
-       spin_unlock_irqrestore(&priv->lock, flags);
-
-       return ret;
-}
 
 /*
  * Activate/Deactivat Tx DMA/FIFO channels according tx fifos mask
index 94ce026..ac02342 100644 (file)
@@ -1262,6 +1262,37 @@ static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
                wake_up_interruptible(&priv->wait_command_queue);
 }
 
+int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
+{
+       int ret;
+       unsigned long flags;
+
+       spin_lock_irqsave(&priv->lock, flags);
+       ret = iwl_grab_nic_access(priv);
+       if (ret)
+               goto err;
+
+       if (src == IWL_PWR_SRC_VAUX) {
+               u32 val;
+               ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
+                                           &val);
+
+               if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
+                       iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
+                                              APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
+                                              ~APMG_PS_CTRL_MSK_PWR_SRC);
+       } else {
+               iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
+                                      APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
+                                      ~APMG_PS_CTRL_MSK_PWR_SRC);
+       }
+
+       iwl_release_nic_access(priv);
+err:
+       spin_unlock_irqrestore(&priv->lock, flags);
+       return ret;
+}
+
 /**
  * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  *