drm/msm/dpu: inline DSPP_BLK macros
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Mon, 10 Jul 2023 23:49:57 +0000 (02:49 +0300)
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tue, 11 Jul 2023 16:26:41 +0000 (19:26 +0300)
To simplify making changes to the hardware block definitions, expand
corresponding macros. This way making all the changes are more obvious
and visible in the source files.

Tested-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/545359/
Link: https://lore.kernel.org/r/20230704022136.130522-12-dmitry.baryshkov@linaro.org
16 files changed:
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

index fd00814..6b25475 100644 (file)
@@ -174,10 +174,17 @@ static const struct dpu_dsc_cfg msm8998_dsc[] = {
 };
 
 static const struct dpu_dspp_cfg msm8998_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &msm8998_dspp_sblk),
-       DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
-                &msm8998_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &msm8998_dspp_sblk,
+       }, {
+               .name = "dspp_1", .id = DSPP_1,
+               .base = 0x56000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &msm8998_dspp_sblk,
+       },
 };
 
 static const struct dpu_intf_cfg msm8998_intf[] = {
index 9fd68a4..1562dcb 100644 (file)
@@ -152,14 +152,27 @@ static const struct dpu_lm_cfg sdm845_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sdm845_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_1", .id = DSPP_1,
+               .base = 0x56000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_2", .id = DSPP_2,
+               .base = 0x58000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_3", .id = DSPP_3,
+               .base = 0x5a000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sdm845_pp[] = {
index 9c5e565..a31dbe0 100644 (file)
@@ -161,14 +161,27 @@ static const struct dpu_lm_cfg sm8150_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sm8150_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_1", .id = DSPP_1,
+               .base = 0x56000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_2", .id = DSPP_2,
+               .base = 0x58000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_3", .id = DSPP_3,
+               .base = 0x5a000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sm8150_pp[] = {
index 1e7eed1..4e59f26 100644 (file)
@@ -160,14 +160,27 @@ static const struct dpu_lm_cfg sc8180x_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sc8180x_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_1", .id = DSPP_1,
+               .base = 0x56000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_2", .id = DSPP_2,
+               .base = 0x58000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_3", .id = DSPP_3,
+               .base = 0x5a000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sc8180x_pp[] = {
index 23d4b59..17e4545 100644 (file)
@@ -161,14 +161,27 @@ static const struct dpu_lm_cfg sm8250_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sm8250_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_1", .id = DSPP_1,
+               .base = 0x56000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_2", .id = DSPP_2,
+               .base = 0x58000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_3", .id = DSPP_3,
+               .base = 0x5a000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sm8250_pp[] = {
index 38225af..671ff10 100644 (file)
@@ -97,8 +97,12 @@ static const struct dpu_lm_cfg sc7180_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sc7180_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sc7180_pp[] = {
index 356ea61..4ae5377 100644 (file)
@@ -67,8 +67,12 @@ static const struct dpu_lm_cfg sm6115_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sm6115_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sm6115_pp[] = {
index b1b027f..c640e45 100644 (file)
@@ -105,8 +105,12 @@ static const struct dpu_lm_cfg sm6350_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sm6350_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-               &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static struct dpu_pingpong_cfg sm6350_pp[] = {
index c1181f8..df6b074 100644 (file)
@@ -64,8 +64,12 @@ static const struct dpu_lm_cfg qcm2290_lm[] = {
 };
 
 static const struct dpu_dspp_cfg qcm2290_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg qcm2290_pp[] = {
index 1dd7771..6536a17 100644 (file)
@@ -68,8 +68,12 @@ static const struct dpu_lm_cfg sm6375_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sm6375_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-               &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sm6375_pp[] = {
index 1515c5e..68b7a74 100644 (file)
@@ -159,14 +159,27 @@ static const struct dpu_lm_cfg sm8350_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sm8350_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_1", .id = DSPP_1,
+               .base = 0x56000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_2", .id = DSPP_2,
+               .base = 0x58000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_3", .id = DSPP_3,
+               .base = 0x5a000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sm8350_pp[] = {
index f7bd14f..b7771e9 100644 (file)
@@ -105,8 +105,12 @@ static const struct dpu_lm_cfg sc7280_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sc7280_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sc7280_pp[] = {
index f532e9e..580fcb6 100644 (file)
@@ -155,14 +155,27 @@ static const struct dpu_lm_cfg sc8280xp_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sc8280xp_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_1", .id = DSPP_1,
+               .base = 0x56000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_2", .id = DSPP_2,
+               .base = 0x58000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_3", .id = DSPP_3,
+               .base = 0x5a000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sc8280xp_pp[] = {
index 62aa785..816067e 100644 (file)
@@ -161,14 +161,27 @@ static const struct dpu_lm_cfg sm8450_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sm8450_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_1", .id = DSPP_1,
+               .base = 0x56000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_2", .id = DSPP_2,
+               .base = 0x58000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_3", .id = DSPP_3,
+               .base = 0x5a000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sm8450_pp[] = {
index 7d311fc..807f382 100644 (file)
@@ -178,14 +178,27 @@ static const struct dpu_lm_cfg sm8550_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sm8550_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_1", .id = DSPP_1,
+               .base = 0x56000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_2", .id = DSPP_2,
+               .base = 0x58000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_3", .id = DSPP_3,
+               .base = 0x5a000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 static const struct dpu_pingpong_cfg sm8550_pp[] = {
        PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x69000, MERGE_3D_0, sc7280_pp_sblk,
index d7b5a1a..44a8222 100644 (file)
@@ -441,14 +441,6 @@ static const struct dpu_dspp_sub_blks sdm845_dspp_sblk = {
                .len = 0x90, .version = 0x40000},
 };
 
-#define DSPP_BLK(_name, _id, _base, _mask, _sblk) \
-               {\
-               .name = _name, .id = _id, \
-               .base = _base, .len = 0x1800, \
-               .features = _mask, \
-               .sblk = _sblk \
-               }
-
 /*************************************************************
  * PINGPONG sub blocks config
  *************************************************************/