return RISCV::X0 == MI.getOperand(0).getReg();
}
-static MachineInstr *elideCopies(MachineInstr *MI,
- const MachineRegisterInfo *MRI) {
- while (true) {
- if (!MI->isFullCopy())
- return MI;
- if (!Register::isVirtualRegister(MI->getOperand(1).getReg()))
- return nullptr;
- MI = MRI->getVRegDef(MI->getOperand(1).getReg());
- if (!MI)
- return nullptr;
- }
-}
-
static VSETVLIInfo computeInfoForInstr(const MachineInstr &MI, uint64_t TSFlags,
const MachineRegisterInfo *MRI) {
VSETVLIInfo InstrInfo;
// If the tied operand is an IMPLICIT_DEF we can keep TailAgnostic.
const MachineOperand &UseMO = MI.getOperand(UseOpIdx);
MachineInstr *UseMI = MRI->getVRegDef(UseMO.getReg());
- if (UseMI) {
- UseMI = elideCopies(UseMI, MRI);
- if (UseMI && UseMI->isImplicitDef()) {
- TailAgnostic = true;
- if (UsesMaskPolicy)
- MaskAgnostic = true;
- }
+ if (UseMI && UseMI->isImplicitDef()) {
+ TailAgnostic = true;
+ if (UsesMaskPolicy)
+ MaskAgnostic = true;
}
// Some pseudo instructions force a tail agnostic policy despite having a
// tied def.