const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
: NativeRegisterContextRegisterInfo(
native_thread, CreateRegisterInfoInterface(target_arch)),
- m_regset_offsets({0}) {
+ NativeRegisterContextDBReg_x86(native_thread), m_regset_offsets({0}) {
assert(m_gpr.size() == GetRegisterInfoInterface().GetGPRSize());
std::array<uint32_t, MaxRegSet + 1> first_regnos;
NativeRegisterContextLinux_arm::NativeRegisterContextLinux_arm(
const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
- : NativeRegisterContextRegisterInfo(
- native_thread, new RegisterInfoPOSIX_arm(target_arch)) {
+ : NativeRegisterContextRegisterInfo(native_thread,
+ new RegisterInfoPOSIX_arm(target_arch)),
+ NativeRegisterContextLinux(native_thread) {
assert(target_arch.GetMachine() == llvm::Triple::arm);
::memset(&m_fpr, 0, sizeof(m_fpr));
const ArchSpec &target_arch, NativeThreadProtocol &native_thread,
std::unique_ptr<RegisterInfoPOSIX_arm64> register_info_up)
: NativeRegisterContextRegisterInfo(native_thread,
- register_info_up.release()) {
+ register_info_up.release()),
+ NativeRegisterContextLinux(native_thread) {
::memset(&m_fpr, 0, sizeof(m_fpr));
::memset(&m_gpr_arm64, 0, sizeof(m_gpr_arm64));
::memset(&m_hwp_regs, 0, sizeof(m_hwp_regs));
NativeRegisterContextLinux_ppc64le::NativeRegisterContextLinux_ppc64le(
const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
: NativeRegisterContextRegisterInfo(
- native_thread, new RegisterInfoPOSIX_ppc64le(target_arch)) {
+ native_thread, new RegisterInfoPOSIX_ppc64le(target_arch)),
+ NativeRegisterContextLinux(native_thread) {
if (target_arch.GetMachine() != llvm::Triple::ppc64le) {
llvm_unreachable("Unhandled target architecture.");
}
NativeRegisterContextLinux_s390x::NativeRegisterContextLinux_s390x(
const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
: NativeRegisterContextRegisterInfo(
- native_thread, CreateRegisterInfoInterface(target_arch)) {
+ native_thread, CreateRegisterInfoInterface(target_arch)),
+ NativeRegisterContextLinux(native_thread) {
// Set up data about ranges of valid registers.
switch (target_arch.GetMachine()) {
case llvm::Triple::systemz:
const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
: NativeRegisterContextRegisterInfo(
native_thread, CreateRegisterInfoInterface(target_arch)),
- m_regset_offsets({0}) {
+ NativeRegisterContextDBReg_x86(native_thread), m_regset_offsets({0}) {
assert(m_gpr.size() == GetRegisterInfoInterface().GetGPRSize());
std::array<uint32_t, MaxRegularRegSet + 1> first_regnos;