arm64: dts: allwinner: a64: add cooling maps and thermal tripping points

Add cooling maps and thermal tripping points to prevent CPU overheating when
running at the highest frequency. Tripping points are taken from A33 dts since
A64 user manual doesn't mention when we should start throttling.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 72eedd3..862b47d 100644 (file)
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -53,6 +53,7 @@
                        next-level-cache = <&L2>;
                        clocks = <&ccu 21>;
                        clock-names = "cpu";
+                       #cooling-cells = <2>;
                };
 
                cpu1: cpu@1 {
@@ -63,6 +64,7 @@
                        next-level-cache = <&L2>;
                        clocks = <&ccu 21>;
                        clock-names = "cpu";
+                       #cooling-cells = <2>;
                };
 
                cpu2: cpu@2 {
@@ -73,6 +75,7 @@
                        next-level-cache = <&L2>;
                        clocks = <&ccu 21>;
                        clock-names = "cpu";
+                       #cooling-cells = <2>;
                };
 
                cpu3: cpu@3 {
@@ -83,6 +86,7 @@
                        next-level-cache = <&L2>;
                        clocks = <&ccu 21>;
                        clock-names = "cpu";
+                       #cooling-cells = <2>;
                };
 
                L2: l2-cache {
@@ -187,6 +191,46 @@
                        polling-delay-passive = <0>;
                        polling-delay = <0>;
                        thermal-sensors = <&ths 0>;
+
+                       cooling-maps {
+                               map0 {
+                                       trip = <&cpu_alert0>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+                               map1 {
+                                       trip = <&cpu_alert1>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+                       };
+
+                       trips {
+                               cpu_alert0: cpu_alert0 {
+                                       /* milliCelsius */
+                                       temperature = <75000>;
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+
+                               cpu_alert1: cpu_alert1 {
+                                       /* milliCelsius */
+                                       temperature = <90000>;
+                                       hysteresis = <2000>;
+                                       type = "hot";
+                               };
+
+                               cpu_crit: cpu_crit {
+                                       /* milliCelsius */
+                                       temperature = <110000>;
+                                       hysteresis = <2000>;
+                                       type = "critical";
+                               };
+                       };
                };
 
                gpu0_thermal: gpu0-thermal {