arm: dts: k3: Add RTI watchdogs
authorJan Kiszka <jan.kiszka@siemens.com>
Tue, 23 Jun 2020 11:15:10 +0000 (13:15 +0200)
committerLokesh Vutla <lokeshvutla@ti.com>
Tue, 11 Aug 2020 04:48:27 +0000 (10:18 +0530)
Add DT entries for main domain watchdog0 and 1 instances on the J721e
well as RTI1-based watchdog on the AM65x. RTI0 does not work for this
purpose on the AM65x, so leave it out.

On AM65x, we mark the power-domain as shared because RTI firmware such
as https://github.com/siemens/k3-rti-wdt may request it as well in order
to prevent accidental shutdown of the watchdog.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
arch/arm/dts/k3-am65-mcu.dtsi
arch/arm/dts/k3-j721e-main.dtsi

index 13556858392f81a6ef3ddee6be2bfb7845f7294d..9717cae0a8b715cfefbadc83e7d0233e1843bb55 100644 (file)
                        };
                };
        };
+
+       mcu_rti1: rti@40610000 {
+               compatible = "ti,j7-rti-wdt";
+               reg = <0x0 0x40610000 0x0 0x100>;
+               clocks = <&k3_clks 135 0>;
+               power-domains = <&k3_pds 135 TI_SCI_PD_SHARED>;
+               assigned-clocks = <&k3_clks 135 0>;
+               assigned-clock-parents = <&k3_clks 135 4>;
+       };
 };
index 1433932e7f383f9e64b8f7457f7ddfa0147eefe9..a285b1afa8425ed47910176837f472152ed2d7e0 100644 (file)
                clocks = <&k3_clks 193 0>;
                power-domains = <&k3_pds 193 TI_SCI_PD_EXCLUSIVE>;
        };
+
+       watchdog0: watchdog@2200000 {
+               compatible = "ti,j7-rti-wdt";
+               reg = <0x0 0x2200000 0x0 0x100>;
+               clocks = <&k3_clks 252 1>;
+               power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>;
+               assigned-clocks = <&k3_clks 252 1>;
+               assigned-clock-parents = <&k3_clks 252 5>;
+       };
+
+       watchdog1: watchdog@2210000 {
+               compatible = "ti,j7-rti-wdt";
+               reg = <0x0 0x2210000 0x0 0x100>;
+               clocks = <&k3_clks 253 1>;
+               power-domains = <&k3_pds 253 TI_SCI_PD_EXCLUSIVE>;
+               assigned-clocks = <&k3_clks 253 1>;
+               assigned-clock-parents = <&k3_clks 253 5>;
+       };
 };