2014-02-01 Richard Sandiford <rdsandiford@googlemail.com>
+ * gcc.dg/tree-ssa/ssa-dom-thread-4.c: Adjust expected MIPS output.
+
+2014-02-01 Richard Sandiford <rdsandiford@googlemail.com>
+
* g++.dg/pr49718.C: Use -mno-relax-pic-calls for MIPS.
2014-02-01 Richard Sandiford <rdsandiford@googlemail.com>
"a_elt || b_elt" and "b_elt && kill_elt" into two conditions each,
rather than using "(var1 != 0) op (var2 != 0)". Also, as on other targets,
we duplicate the header of the inner "while" loop. There are then
- 6 threading opportunities:
+ 4 threading opportunities:
1x "!a_elt && b_elt" in the outer "while" loop
-> the start of the inner "while" loop,
1x "!b_elt" in the first condition
-> the outer "while" loop's continuation point,
skipping the known-false "b_elt" in the second condition.
- 2x "!kill_elt" in the inner "while" loop
- -> the outer "while" loop's continuation point,
- skipping the known-false "b_elt && kill_elt" in the second condition
- 2x "kill_elt->indx < b_elt->indx" in the first "while" loop
+ 2x "kill_elt->indx >= b_elt->indx" in the first "while" loop
-> "kill_elt->indx == b_elt->indx" in the second condition,
skipping the known-true "b_elt && kill_elt" in the second
condition. */
/* Likewise for arc. */
/* For avr, BRANCH_COST is by default 0, so the default
LOGICAL_OP_NON_SHORT_CIRCUIT definition also computes as 0. */
-/* { dg-final { scan-tree-dump-times "Threaded" 6 "dom1" { target mips*-*-* avr-*-* arc*-*-* } } } */
+/* { dg-final { scan-tree-dump-times "Threaded" 4 "dom1" { target mips*-*-* avr-*-* arc*-*-* } } } */
/* { dg-final { cleanup-tree-dump "dom1" } } */