Aes/Pclmulqdq IsSupported should depend on Ssse3 (dotnet/coreclr#20469)
authorFei Peng <fei.peng@intel.com>
Mon, 22 Oct 2018 23:37:26 +0000 (16:37 -0700)
committerCarol Eidt <carol.eidt@microsoft.com>
Mon, 22 Oct 2018 23:37:26 +0000 (23:37 +0000)
Commit migrated from https://github.com/dotnet/coreclr/commit/a581e9b63f4fa42b1913640c24df2257cf54f2fb

src/coreclr/src/jit/compiler.cpp

index e11d11f..02ce8bf 100644 (file)
@@ -2428,13 +2428,6 @@ void Compiler::compSetProcessor()
         {
             opts.setSupportedISA(InstructionSet_SSE2);
         }
-        if (jitFlags.IsSet(JitFlags::JIT_FLAG_USE_AES))
-        {
-            if (configEnableISA(InstructionSet_AES))
-            {
-                opts.setSupportedISA(InstructionSet_AES);
-            }
-        }
         if (jitFlags.IsSet(JitFlags::JIT_FLAG_USE_LZCNT))
         {
             if (configEnableISA(InstructionSet_LZCNT))
@@ -2442,13 +2435,6 @@ void Compiler::compSetProcessor()
                 opts.setSupportedISA(InstructionSet_LZCNT);
             }
         }
-        if (jitFlags.IsSet(JitFlags::JIT_FLAG_USE_PCLMULQDQ))
-        {
-            if (configEnableISA(InstructionSet_PCLMULQDQ))
-            {
-                opts.setSupportedISA(InstructionSet_PCLMULQDQ);
-            }
-        }
         if (jitFlags.IsSet(JitFlags::JIT_FLAG_USE_POPCNT))
         {
             if (configEnableISA(InstructionSet_POPCNT))
@@ -2490,6 +2476,22 @@ void Compiler::compSetProcessor()
                     opts.setSupportedISA(InstructionSet_SSSE3);
                 }
             }
+            // AES and PCLMULQDQ requires 0x660F38/A encoding that is
+            // only used by SSSE3 and above ISAs
+            if (jitFlags.IsSet(JitFlags::JIT_FLAG_USE_AES))
+            {
+                if (configEnableISA(InstructionSet_AES))
+                {
+                    opts.setSupportedISA(InstructionSet_AES);
+                }
+            }
+            if (jitFlags.IsSet(JitFlags::JIT_FLAG_USE_PCLMULQDQ))
+            {
+                if (configEnableISA(InstructionSet_PCLMULQDQ))
+                {
+                    opts.setSupportedISA(InstructionSet_PCLMULQDQ);
+                }
+            }
         }
 
         // There are currently two sets of flags that control instruction sets that require the VEX encoding:
@@ -2545,7 +2547,8 @@ void Compiler::compSetProcessor()
             codeGen->getEmitter()->SetContains256bitAVX(false);
         }
         else if (compSupports(InstructionSet_SSSE3) || compSupports(InstructionSet_SSE41) ||
-                 compSupports(InstructionSet_SSE42))
+                 compSupports(InstructionSet_SSE42) || compSupports(InstructionSet_AES) ||
+                 compSupports(InstructionSet_PCLMULQDQ))
         {
             // Emitter::UseSSE4 controls whether we support the 4-byte encoding for certain
             // instructions. We need to check if either is supported independently, since