drm/i915/dsb: Stop with the RMW
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 16 Dec 2022 00:37:58 +0000 (02:37 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 13 Jan 2023 14:46:59 +0000 (16:46 +0200)
We don't want to keep random bits set in DSB_CTRL. Stop the
harmful RMW.

Also flip the reverse & around to appease my ocd.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221216003810.13338-2-ville.syrjala@linux.intel.com
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
drivers/gpu/drm/i915/display/intel_dsb.c
drivers/gpu/drm/i915/i915_reg.h

index 3d63c1b..ebebaf8 100644 (file)
@@ -73,42 +73,34 @@ struct intel_dsb {
 static bool is_dsb_busy(struct drm_i915_private *i915, enum pipe pipe,
                        enum dsb_id id)
 {
-       return DSB_STATUS & intel_de_read(i915, DSB_CTRL(pipe, id));
+       return intel_de_read(i915, DSB_CTRL(pipe, id)) & DSB_STATUS_BUSY;
 }
 
 static bool intel_dsb_enable_engine(struct drm_i915_private *i915,
                                    enum pipe pipe, enum dsb_id id)
 {
-       u32 dsb_ctrl;
-
-       dsb_ctrl = intel_de_read(i915, DSB_CTRL(pipe, id));
-       if (DSB_STATUS & dsb_ctrl) {
+       if (is_dsb_busy(i915, pipe, id)) {
                drm_dbg_kms(&i915->drm, "DSB engine is busy.\n");
                return false;
        }
 
-       dsb_ctrl |= DSB_ENABLE;
-       intel_de_write(i915, DSB_CTRL(pipe, id), dsb_ctrl);
-
+       intel_de_write(i915, DSB_CTRL(pipe, id), DSB_ENABLE);
        intel_de_posting_read(i915, DSB_CTRL(pipe, id));
+
        return true;
 }
 
 static bool intel_dsb_disable_engine(struct drm_i915_private *i915,
                                     enum pipe pipe, enum dsb_id id)
 {
-       u32 dsb_ctrl;
-
-       dsb_ctrl = intel_de_read(i915, DSB_CTRL(pipe, id));
-       if (DSB_STATUS & dsb_ctrl) {
+       if (is_dsb_busy(i915, pipe, id)) {
                drm_dbg_kms(&i915->drm, "DSB engine is busy.\n");
                return false;
        }
 
-       dsb_ctrl &= ~DSB_ENABLE;
-       intel_de_write(i915, DSB_CTRL(pipe, id), dsb_ctrl);
-
+       intel_de_write(i915, DSB_CTRL(pipe, id), 0);
        intel_de_posting_read(i915, DSB_CTRL(pipe, id));
+
        return true;
 }
 
index c76a02c..18c16e0 100644 (file)
@@ -8102,7 +8102,7 @@ enum skl_power_gate {
 #define DSB_TAIL(pipe, id)             _MMIO(DSBSL_INSTANCE(pipe, id) + 0x4)
 #define DSB_CTRL(pipe, id)             _MMIO(DSBSL_INSTANCE(pipe, id) + 0x8)
 #define   DSB_ENABLE                   (1 << 31)
-#define   DSB_STATUS                   (1 << 0)
+#define   DSB_STATUS_BUSY              (1 << 0)
 
 #define CLKREQ_POLICY                  _MMIO(0x101038)
 #define  CLKREQ_POLICY_MEM_UP_OVRD     REG_BIT(1)